资源列表
uboot
- U-boot源代码分析，清楚的说明了U-boot的初始化，设置DMA、定时器、中断向量等等。-U-boot source code analysis
comm1
- 与多种变频器型号通讯代码(丹佛斯,台达VFD-F，台达VFD-P,三基SA系列,西门子MM430系列,英威腾CHF100,三菱F700,三基S3000/S800).-Drive model with a variety of communication code (Danfoss, Delta VFD-F, Delta VFD-P, three base SA series, Siemens MM430 series, INVT CHF100, Mitsubishi F700, three ba
urjtag-0.10.tar
- 修改版的Urjtag用来连接Jlink使用，参考Urjtag的源代码修改-Urjtag is a universy jtag debug tools,a opensource project,so you can modify for your project.After modified you shuold compile with Cygwin for windows，This source tar resolve the error “can not connect to suitabl
xinxingdeng
- 心形流水灯32位共阳接法，是比较炫的心形灯共有12种状态。-Heart-shaped water lamp 32 common anode connection, is relatively unusual heart-shaped lamp in 12 states.
TEST
- 这是一段VHDL代码，用于对FPGA开发环境的熟悉。-This is a VHDL .
transport-light
- 提供利用FPGA设计一个简单交通灯的方法。提供原码以及逻辑图的文件-transport light
MCU-ASM
- 简易的电子琴设计，主要提供电子琴的一些设计方法与步骤-it is a electric panio
mosfet
- 基于multisim的mos管实例，包括偏置电路、特性曲线等-Mos-based pipe instance multisim, including bias circuit, characteristics, etc.
modbus_master
- 简单的modbus主机协议实现、测试代码- This is a simple test program for a modbus master device.
counterbasedDPWM
- 计数器方式的DPWM，有点简单，1本人是初学者，希望见谅，有更好的一定及时上传-DPWM Counter mode, a little simple, I am a beginner, I hope will forgive me, surely there is a better and timely uploads
adder_4
- 四位加法器的三种实现方法，包括行为级描述、行波进位加法器、超前进位加法器-Three of four adder implementations, including behavioral descr iptions, ripple carry adder, look-ahead adder
cpu_1
- 用verilog设计五级CPU的框架，需要自己另行补充指令，可作为学生作业和训练内容-Five CPU with verilog design framework, needs its own separate supplemental instruction can be used as student assignments and training content