资源列表
clock
- 数字时钟 LCD1602显示 可以校时。 编译环境QUARTUS II 7.2 -Digital clock LCD1602 display can be corrected. Compilation environment QUARTUS II 7.2
adc0808
- 数字电压表 AT89C51主控芯片 0808来对数据转换-AT89C51 control ADC0808 that sample analog data and 1602 is used by display
xunjixiaoche
- 北京邮电大学信息与通信工程学院信息工程专业电子工艺实习智能循迹小车源代码-Beijing University of Posts and Information and Communication Engineering, Information Engineering Practice smart electronic technology source code tracking car
STM32-SI4463-SGOU
- STM32-SI4463 口线SPI接收 测试通过-STM32-SI4463-wire SPI port receiving the test
open_loop
- 飞思卡尔 DSC 56800e 控制光电编码器无刷直流电机BLDCM 源代码 分享-freescale56F8323 control BLDCM code
DCU3_Jtagging_of_an_ST5105_device_based_STB
- The ST5105 has been superceeded by the ST5119, but it probably also maps memory in the same manner as the 5105 and it a safe bet that it also uses DCU3control for Jtagging
Pingulux-JTAG
- JTAG-Flash für Edision argus Pingulux Receiver
SNTP
- 电能表SNTP对时的源码，通过lwip发送ntp的报文给服务器，收到数据后计算时间，与本机时间相差不超过五分钟，即修改本系统的时间。MCU采用的是LPC1768。-sntp lwip lpc1768
MSP430CC1101com
- MSP430+CC1101通过串口透传模块源代码，是学习的好例子。-MSP430+ CC1101 through the serial pass-through module source code, is a good example of learning.
working--weather4cast
- project weatherforecasting.......using pic16f876a
i2c
- iic interface toDS13o7
Middlefilter
- 基于FPGA的中指滤波器，使用verilog语言实现，仿真结果正常。-FPGA-based middle filter using verilog language, simulation results properly.