资源列表
VHDL
- 分块地址产生电路，根据FPGA的要求，按照存储模块分块管理的要求产生电路-Block address generating circuit according to the requirements of FPGA, the memory module according to the requirements of the management block generating circuit
GP2Y1010
- GP2Y1010灰尘传感器 51单片机源代码
QAM161
- 一个QAM16调制方式的verilog设计，包括4个verilog源代码，能够构成一个完整的QAM调制器-A QAM16 modulationVerilog design , including four verilog source code, which can form a complete QAM modulator
beautifullyClock
- 制作时钟 嵌入式
IFFT
- 一个IFFT滤波器的verilog源代码，用于滤波器设计参考-An IFFT filter verilog source code for filter design reference
CLOCK_GENERATOR
- 一个verilog时钟发生器源代码，能够满足最小时间间隔0.1ns的时钟计时要求。-A clock generator verilog source code, to meet the minimum time interval of 0.1ns clock timing requirements.
i2c
- i2c controller-i2c controller
Bayer-filter
- Bayer filter-Bayer filter
vga_gen
- VGA Timing generator-VGA Timing generator
spi
- SPI controller-SPI controller
dvi_ctrl_ch7301c
- controller of CH7301C DVI Transmitter Device
norflash
- nonflash.c文件，是针对nonflash的读取文件，写文件等等功能的源码说明-the function of nonflash