资源列表
adder
- VHDL Adder implementation done in FPGA environment. VHDL Adder implementation done in FPGA environment.-VHDL Adder implementation done in FPGA environment.VHDL Adder implementation done in FPGA environment.VHDL Adder implementation done in FPGA envir
Experiment01
- 在这一个实验，我们要以上图作为基础，建立一个并行操作的流水灯模块-In this experiment, we have to figure above as a basis for establishing a parallel operation of the water lamp module
FPGA_Function_v3
- 基于cpld的多波形信号发生器。 可产生方波，三角波，正弦波，锯齿波。 可以通过一组拨码开关进行频率增加和减少。其中频率在100~1000hz不连续变化。-Based on multi-waveform signal generator cpld. Can produce a square wave, triangle wave, sine wave, sawtooth wave. Through a set of DIP switch frequency increases and d
eignt-responder
- 一个以单片机为核心的具有定时功能的八位抢答器。抢答器同时供八位选手比赛，分别用八个开关控制。设置有一个系统清除和抢答控制开关，并由主持人控制。-A microcontroller as the core of the eight with a timer Responder. Responder same time for eight players race, respectively, with eight switch control. Provided with a clear and
Lpc1766 Lwip
- 初学LWip，在COOS Lwip下采用Lwip API添加UDP回显线程实现LPC17xx UDP通信
VGA
- 利用程序实现VGA显示RGB彩条信号,本人亲自验证，有用的程序-as the title
pwm_engine
- Modul PWM. Can used in Quartus II. On language VHDL.
text
- 用Verilog写的简单的屏幕控制，在屏幕上有四个帧，方块在呈现抛物线状运动的同时改变颜色。-Using Verilog to write simple on-screen controls on the screen there are four frames, boxes rendered parabolic movement while changing color.
DS18B20
- 基于AT89C52的数字温湿度计，采用LCD，设计较为简单，供新手参考。-Based on AT89C52 digital hygrometer, using LCD, design is more simple for novice reference.
wasijiance1602
- 这个c程序用于实现mq2模块检测瓦斯浓度，并经1602显示，最后经24l01发射出去-This c program used to implement mq2 module detects a gas concentration, and by 1602, the last emitted by 24l01
huangjingjiance
- 这个c程序用于实现各种环境系数的检测包括温度，湿度，风速，气压等。-This c program used to implement the detection of various environmental factors, including temperature, humidity, wind speed and air pressure.
ds1302P12864P18b20
- 这个c程序用于实现通过12864显示ds1302时钟显示，ds18b20温度显示。-This c program is used to achieve through 12864 ds1302 clock display, ds18b20 temperature display.