资源列表
V1
- 基于PIC16F877A的串口通信程序参考-PIC16F877A-based serial communication program reference
V1
- 基于PIC6F877A单片机的流水等程序-Microcontroller based PIC6F877A water and other procedures
LED_Test
- 用Keil软件建立的S3C2440的ARM工程，可以用于仿真ARM运行程序，虽然简单，但是意义不一样-Established with the Keil software S3C2440 ARM-engineering, simulation can be used to run programs ARM, although simple, but the meaning is not the same
V3_IOTestOS_UCosII_2378_2339
- keil4环境，lpc2378+uCosII平台使用SP2339驱动（串口1扩3）纯净版。编译通过，直接可用-keil4 environment, lpc2378+uCosII platform SP2339 Drive (Serial an extended 3) clean version. Compile, directly available
OS_UCosII_2378_BEEP_OK
- keil4环境LPC2378实现较稳定的纯净uCosII操作系统原码-keil4 environment LPC2378 achieve a more stable operating system source code pure uCosII
JPEG_ENC
- 基于ADI的BF561芯片，开发环境是VisualDSP++，，实现视频图像的JPEG格式编码功能。-Based on the ADI BF561 chip development environment is VisualDSP++,, realize the video images in JPEG format encoding.
MP3_DEC
- 基于ADI的BF561芯片，开发环境是VisualDSP++，实现MP3解码功能。-Based on the ADI BF561 chip development environment is VisualDSP++, realize MP3 decoding capabilities.
FIR
- 基于ADI的BF561芯片，开发环境是VisualDSP++，FIR滤波器的实现。-Based on the ADI BF561 chip development environment is VisualDSP++, FIR filter implementation.
h2
- 加法器 输入信号： 输入数实部Ra，Rb，Rc，Rd，虚部Ia，Ib，Ic，Id的数据宽度均为19位；每次向加法器阵列只能送一个操作数，包括实数R（19bit）、虚部I（19bit）；操作数据a、c、b、d的顺序连续送入，在加法器列中要进行串并变换。 CP脉冲。 输出信号： 输出数实部Ra’，Rb’，Rc’，Rd’，虚部Ia’，Ib’，Ic’，Id’的数据宽度均为21位。-Adder input signal: the real part of the input numbe
juzhenjianpan
- 这是FPGA控制4*4矩阵键盘的程序，程序是用Verilog写的-This is the FPGA control 4* 4 matrix keyboard, the program is using Verilog
NRF24LE1
- 通过串口上报主读写器与从读写器识别到的标签信息，通过SPI 接受从读写模块识别到的标签ID信息-Reporting through the serial port from the master reader to reader identification tag information received from the reader through the SPI module identification tag ID information to
FPGA--VGA-
- 这是FPGA控制VGA的一篇文章，包括原理及心得，代码也是用Verilog写的。-This is the FPGA to control VGA article, including the theory and experience, the code is using Verilog.