资源列表
program
- TI dsp dm642的一些测试程序，适合初学者-TI dsp dm642 some testing procedures, suitable for beginners
F281x
- 2812 TI官方例程，Example_281x_Flash_to_RAM_nonBIOS-2812 TI official routine, Example_281x_Flash_to_RAM_nonBIOS
ourdev_638192P0QRIU
- mini1608 v1源程序,杜洋老师的作品-mini1608 v1 source, Du Yang teacher works
temperature-alarm
- 这是一个简单的温度高低报警器，可以设置温度上限和温度下限，一旦温度满足设定条件，蜂鸣器就会发出声音进行报警。内带PROTUES仿真，可直接查看效果。-This is a simple and low temperature alarm, you can set the temperature of the upper and lower temperature limit, the buzzer will sound the alarm once the temperature to meet
daima
- 单片机入门，1602显示模块，用于各种电子设计模块，C程序代码-SCM entry, the 1602 display module, used in a variety of electronic design module C code
control_test
- ATMEGA128遥控器输入检测并输出控制三路舵机PWM波，周期20ms-ATMEGA128 detection remote control input and output control three servos PWM wave cycle 20ms
RTThread_uart1
- 基于cortex-m3内核的STM32F107，RTThread操作系统上使用uart1-Cortex-m3 kernel-based STM32F107, RTThread operating system used on uart1
LED-controller
- LED Controller, Integrated Circuit board-LED Controller
TFT-LCD(SSD1289)
- 基于cortex-m3内核的STM32F107，在TFT-LCD(SSD1289)液晶上显示文字以及图片。-Cortex-m3 based kernel STM32F107, TFT-LCD (SSD1289) LCD display text and pictures.
asynchronous-FIFO-verilog
- FIFO是英文First In First Out 的缩写，是一种先进先出的数据缓存器，他与普通存储器的区别是没有外部读写地址线，这样使用起来非常简单-FIFO is an abbreviation of the English First In First Out, is a first-in, first-out data buffer, the difference between him and ordinary memory is external read and write add
Berlekampalgorithm_Verilog_hdl
- RS编码器是Reed Solomon编码器的简称，它是目前最有效、应用最广泛的差错控制编码方法之一。-The RS encoder Reed Solomon encoder referred, it is the most effective, the most widely used error control coding method one.
FPGA-port_Verilog_HDL
- CY7C68013与FPGA接口的Verilog HDL实现，经过本人实验检验过的，-CY7C68013 and FPGA interface Verilog HDL realize the experiment after I test