资源列表
lab4_VHDL
- VHDL数字系统设计和工程实践2，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.
lab5_VHDL
- VHDL数字系统设计和工程实践3，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, 3, including the principles, truth table and schematic, as well as VHDL source code.
lab6_VHDL
- VHDL数字系统设计和工程实践5，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice 4, including the principles, truth table and schematic, as well as VHDL source code.
lab7_VHDL
- VHDL数字系统设计和工程实践6，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, six, including the principles, truth table and schematic, as well as VHDL source code.
VHDL
- vhdl表示与综合，原书第二版，中文版，比较全，用超星打开-vhdl
cpu8088
- 8088 verilog 源代码，详见V代码以及TESTBENCH仿真
Decoder
- This a verilog file which is used as a decoder-This is a verilog file which is used as a decoder
bus
- 一个简单的总线bus代码，初学者可以借鉴学习-A simple bus-bus code, beginners can learn to learn
shiftreg
- 本代码实现了移位寄存器功能，初学者可借鉴学习-This code implements the shift register functions, beginners can learn to learn
486bus
- 本代码实现了486总线的功能，初学者可以借鉴学习-This code implements the 486 bus functions, beginners can learn to learn
outshiftreg
- 本代码实现了输出移位寄存器功能，初学者可以借鉴学习-This code implements the output shift register functions, beginners can learn to learn