资源列表
pcm
- 该程序设计了一个产生PCM码流时序信号的模块，他包括输入端CLK，SET及输出端Q1,Q2,Q3-the program have designed a PCM signal timing modules, including the CLK input, and output SET Q1, Q2 and Q3
Verilog HDL设计练习进阶
- 初学verilog HDL时 找的好资料 大家共享-Beginners should try to find a good share information
air_conditioner
- 空调温控电路有限状态自动机， 有ＴＥＭＰ＿ＨＩＧＨ和ＴＥＭＰ＿ＬＯＷ 分别与传感器相连用语检测室内温度．-air-conditioning temperature control circuit finite state automaton, and TEMP_LOW TEMP_HIGH with sensors connected to the indoor temperature detection terminology.
SCAN_COUNT
- 用VHDL编写的关于SCAN的一个小程序，希望大家看了后能喜欢，也可以学学哟！-VHDL SCAN prepared on a small procedures in the hope that after reading them you will like and can learn yo!
cpu16
- 一个16位cpu的vhdl代码。具体内容我也不清楚，自己慢慢研究吧-a 16 cpu of VHDL code. Specific content is not clear to me that their study it slowly
alu_vlog
- 学习使用HDL Bencher生成测试积累，并直接调用ModelSim进行仿真的方法.-learning HDL Bencher generate test accumulation, and called directly ModelSim simulation methods.
sorce
- 一个很好的利用verilog编程实现的cpu程序，一定要好好利用。-a good use of the Verilog Programming cpu procedures, we must make good use of.
路口交通灯
- 个人硬件课程设计，简单实现了FPGA平台的路口交通灯管理，开发环境为MAX+plus-individual hardware curriculum design, a simple realization FPGA platform junction traffic lights management, development environment for MAX plus
msttr
- msttr是用vhdl语言开发的一个交通灯程序-msttr VHDL language is a development of the traffic lights procedures
hjs Verilog
- 是verilog例子。初级适用。包括了简单的例子。-example. The initial application. Including a simple example.
VerilogHDL
- Verilog HDL程序，对硬件开发有兴趣或需要的朋友赶快down下来-Verilog HDL procedures, the development of hardware are interested or needs a friend to see down quickly down
richic_vga_top
- 有关 VHDL进行VGA显示的源程序，请大家好好参考-VHDL for the VGA display the source code, please make reference to