资源列表
ad7818_control
- 本工程是使用Verilog语言，实现了对ad7818采样芯片的灵活控制，包含了原代码和Modelsim仿真程序和仿真结构图-Write by Verilog language.It s the controllor of the ad7818.
c2812rtdxtest_c2000_rtw
- 由MATLAB生成的RTDX的源代码，由模型搭建，然后自动生成DSP的源代码-RTDX generated by MATLAB source code, set up by the model, and then automatically generate DSP source code
fizzim_4.41
- FSM generation tool, exciting one
2048Mb_ddr2
- DDR2 仿真模型 DDR2 仿真模型-DDR2 Simulation Model
pci_core.tar
- vhdl 写的 PCI IP核程序，已经过测试-pci ip core
LPC_Peri
- LPC总线中目标机的vhdl代码，Low pins bus-Low pins bus
costas_loop
- 集中式插入式帧同步发的verilog源代码-concentrative inserted frame sync
medianfilter
- 图像滤波中的中值滤波，有效滤除椒盐噪声，使用verilog语言编写-Image filtering in the median filter, effectively filter out salt and pepper noise, using verilog language
8051pwm
- 8051pwm.rar，带有用51系列单片机来产生pwm波形的c程序，-8051pwm.rar, with the use of 51 computers to generate the pwm waveform c procedures
round_robin_vhdl
- Round Robin using VHDL
48_order-FIR-filter-with-8-folder
- 该代码是设计一个48阶FIR滤波器的文档，该设计方案主要运用了数字信号处理VLSI实现中的折叠的方式。-The code is a 48-order FIR filter design document, the main use of the design of VLSI implementation of digital signal processing in the way of folding.
Desktop
- 曼彻斯特编码的VHDL语言实现，可以用于RFID防碰撞编码的实现-Manchester encoding of the VHDL language, can be used for implementation of RFID anti-collision code