资源列表
seqdet
- 用verilog鉴定10010序列，用verilog鉴定10010序列-10010 sequence identification using Verilog with Verilog identification sequence 10010
TEST5
- 这个是秒表的程序,很简单,不要取笑,多多交流了-This is a stopwatch procedures, is very simple, do not make fun of, a lot of exchange of
3
- 频率计设计 由多个部分组成 主要为了学习VHDL的同学提供 加油 加油 加油 加油 加油 加油 加油 -Cymometer designed by a number of major parts of the students to learn VHDL to provide refueling tanker refueling tanker refueling tanker refueling
vhdlforlab
- vhdl语言程序的a244器件的程序 希望对大家的学习有所帮助-VHDL language procedures a244 device procedures for all of us want to be helpful to learn
lab_6_1
- 用VHDL描述的74ls163,模拟实现其时序逻辑功能-Using VHDL described 74ls163, simulation to achieve its sequential logic functions
i2c
- I2C程序， 已经验证过了 ，大家看看看！-I2C procedures, has already been verified, we take a look at to see!
UART
- 基于FPGA的UART实现 用VHDL编程-The UART-based FPGA using VHDL Programming
digital_filter
- 数字滤波器VHDL源码，在matlab下仿真-Digital filter VHDL source code, under the simulation in matlab
traffic-VHDL
- 最简便的交通灯控制源代码 适合VHDL初学者 十字路口红绿灯控制，数码管显示-The most simple traffic lights to control the source code for VHDL beginners crossroads traffic lights control, digital display
uart_regs
- 串行通讯ip核，经过仿真验证，综合，可以参考使用-Serial communication ip nuclear, through simulation, synthesis, can refer to the use of
all_test_2c5
- 买的开发板上自带的例程，上传与电子爱好的共享-To buy the development of on-board built-in routines, upload and e-loving sharing
8051IP
- 8051的IP,采用VHDL语言描述,支持intel的HEX格式,包括中断,定时器等.-8051 IP, the use of VHDL language descr iption, support intel s HEX format, including the interruption, such as timers.