资源列表
analogue-digi-ana-converter
- design and implementation of a format conversion system on the Altera NIOS board(QUARTUS) which reads an analogue input, converts it into digital data, and then does the reverse conversion back into analogue format. This will be done by taking an ana
vhdl-MIPS
- Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
xilinx0424
- Xilinx中文官方培训材料(全），Xilinx新手用户必备材料。-Xilinx Chinese official training materials (all), Xilinx novice users required materials.
Binary_to_BCD_Converter
- General Binary-to-BCD Converter The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
choosebcd
- 48位BCD码自动识别，并判断是否有无用位，并输出到下一段输出-48 BCD code automatic identification and to determine whether any use of digital and output to the next section of the output
Verilog
- 夏宇闻-Verilog经典教程，对想要学习Verilog的人提供帮助-Xia Wen-Verilog Classic Guide for those who want to learn Verilog help
test_in
- 用Verilog编写的产生图像的程序，实现24位数据量产生图像使用DA转换后直接显示-Verilog prepared using the procedure for selecting the images to achieve 24-bit image data generated using the DA converter and directly show the
NiosII
- 一个NIOS II初学者非常好的资料，提供了大量的实例。-FPGA NIOSII
lcd12864_1
- lcd12864的显示汉字程序源代码，共四行，每行8个汉字。-Chinese lcd12864 display source code, a total of four lines, eight characters per line.
adcontro
- 此程序为FPGA对adc0809的控制以及数据采集程序，谢谢大家指教- This procedure for the FPGA on the adc0809 control and data acquisition procedures, Thank you for your advice
measure
- 用ＶＨＤＬ语言编写一个状态机电路，可实现对脉宽的测量-VHDL language with a state of electrical and mechanical way, enabling the measurement of the pulse width
UniversalRegister
- 这种设计是一个普遍的登记册可作为一个简单的存储登记，双向移位寄存器，计数器的行动和反跌。登记册可以载入了一套并行数据输入和模式是由3位输入。-This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter. The register can be