资源列表
32bitvedic and square
- 32 bit vedic multiplier documentation
MCDF
- 设计一个多动能选择器,完整verilog代码(design a MCDF by Verilog Hdl)
RegCPUData
- 虽然FPGA实现并口输出是一个最简单的,但还是考虑用parameter的参数化方法来配置,这样在使用多个并口时,可以配置并口的宽度和并口的地址,应该更加方便。(Although FPGA parallel output is one of the most simple thing, but still consider using the parametric method to configure it, so that the use of multiple parallel port,
2_key
- 利用两个相差一个时钟周期的寄存器进行&~运算,进行下降沿的检测。可用于按键消抖等。(Two regs are used to detect xiajaingyan with &~, and it can be used to switch debounce)
ex8_232
- 这是一个用于自收自发的uart通讯代码,包括波特率设置模块、uart收发模块,上位机使用串口调试助手(Uart module is used to communite with PC in the way of spontaneous collection, including buad setting and transceiver. Upper computer is serial debugging assistant.)
3_8_decoder_20170407
- 一个简单的38译码器程序,内附真值表,在本实验例程程序中用于Cyclone 2。(A simple program for 38 decoder.)
user_first_fpga_20170620
- 程序可实验开发板上LED循环点亮,且可通过按键控制流动速度,用到了PLL IP 和 计数器模块。(Program with LED flashing circuit uses PLL IP and counter. And extinction rate is controled by key.)
FPGA_test_20170620_1
- 对50M的系统时钟进行分频处理,然后控制led的闪灭(Frequency divider controls led.)
EDA课程设计
- 数据采集()
Vga_Module
- 使用FPGA控制VGA显示波形,显示汉字,水平垂直可调(FPGA controls the VGA display waveform)
HDMI_test
- 基于fpga板子和hdmi传输 测试代码文件(hdmi test code for FPGA)
N25Q064A13E_VG12
- nand flash 仿真模型,官网下载,希望对大家有用(This software code and all associated documentation, comments or other information (collectively "Software") is provided "AS IS" without warranty of any kind.)
