资源列表
polar2rect_VHDL
- 是codic算法实现atan的virilog程序，模块结构如下：Core Structure: sc_corproc.vhd->p2r_cordic.vhd->p2r_cordicpipe.vhd-Atan is the codic algorithm virilog procedures, module is structured as follows: Core Structure: sc_corproc.vhd-> p2r_cordic.vhd-> p2r_cord
vhdl
- 基于VHDL的POC编写与实现 实现三次握手-VHDL-based preparation and implementation of the POC to achieve three-way handshake
xapp391_8b10b
- 8b10b design reference
newDPLLdesign
- 使用VHDL语言进行数字锁相环的设计，pdf格式，可以打开-The use of VHDL language design of digital phase-locked loop, pdf format, you can open
NewWayOfDPLLdesign
- 使用VHDL语言进行设计DPLL（数字锁相环）的相关文件-The use of VHDL language design DPLL (digital phase-locked loop) of the relevant documents
DPLL2
- 全数字锁相环电路的研制，使用的是VHDL语言 -All-digital phase-locked loop circuit development, using the VHDL language
traffic
- Verilog HDL语言设计的交通灯设计-Verilog HDL language designed traffic light design
292548
- < FPGA数字电子系统设计与开发实例导航>>的源代码-<FPGA digital electronic systems design and development examples of navigation>> source code
bhgfdti
- 含有七人表决器，格雷码变换电路，英文字符显示电路，基本触发器（D和JK），74LS160计数器功能模块，步长可变的加减计数器-Containing seven people vote, and Gray code conversion circuit, the English characters display circuit, the basic flip-flop (D and JK), 74LS160 counter function modules, variable-step add
vhdl
- VHDL源码-VHDL source
vhdl100
- VHDL的大量实用例子，一共有100个哦-VHDL of a large number of practical examples, a total of 100 Oh
fpgaexperience
- 很不错的FPGA设计学习资料。非常值得看一看哦。-FPGA design is very good learning materials. Oh well worth a look.