资源列表
FIFO
- it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.-it is a
traffic_controller
- it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.-it is a verilog code written for traffic light controlle
UART_for_FPGArar
- it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]-it is a verilog code written for MELAY state machine based UART and it wll
statment
- 在VHDL的设计中用for 语句来实现2 个8 位数的相乘计算。-In the VHDL design using for statement to achieve two-digit multiplication calculation 8.
sd_card
- 在开发FPGA上比较有用，主要关于SD CARD的源码-FPGA in the development of more useful, the main source of about SD CARD
FPGA4U
- 采用Altera公司的CycloneII芯片EP2C8的一些程序代码。-The use of Altera Corporation CycloneII chip EP2C8 some program code.
DW_8b10b_enc.v.tar
- amba ahb protocol with test benches
pong
- Pong is a mixed schematic, VHDL, Verilog project featuring the PS2 and VGA monitor connections of the Xilinx\Digilent Spartan-3 demo board.
gold_code_vhd_217
- Gold Code Generators in Virtex Devices
freqm
- a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display
jc2_vhd
- JC2_VHD is a bi-directional 4-bit Johnson counter with stop control
cross_street_lights
- Cross street lights driver in VHDL. It have been tested on XILINX 9500.