资源列表
final_9
- 9. 對於按鍵輸入密碼鎖，假設reset後，七節燈管顯示「0」，而且使用sw1、sw2、 sw3、sw4四個，只要按下且放開任何的sw1、sw2鍵，都會讓七節燈管顯示值加「1」，而只要按下且放開任何的sw3、sw4，都會讓七節燈管顯示值加「2」。-9. For the key to enter a password lock, assuming that reset after the seven lamp displays " 0" , and the use of sw1,
final_10
- 10. 對於按鍵輸入密碼鎖，假設reset後，七節燈管顯示「0」，而且使用sw1、sw2二個按鍵輸入，只要按下sw1鍵，都會讓七節燈管顯示值以每秒之速度加「1」，但放開sw1鍵後就停止。-10. For the key to enter a password lock, assuming that reset after the seven lamp displays " 0" , and the use of sw1, sw2 two key input, as long as
MUART
- the transmitter and receiver modules for serial communication
div
- it performs the serail dividing operations
fpuvhdl
- it performs the floating point arithmetic unit
i2c
- inter integrated circuit i2c protocol
Habenera
- Fun little FPGA that plays a portion of Habanera
freq_meter
- Frequency meter Verilog implementation for Xilinx XC2C256. MT10T7 7-seg LCD used for output.
vhdl-100
- 本资料中有100个vhdl的例子，是很好的学习参考资料。对于学习vhdl的人来说是很有用的。-This information has 100 vhdl example, is a good learning reference. For those who learn vhdl is very useful.
vhdl-wenjian
- 这是我的VHDL格式的电子密码锁源程序，请站长审核啊-This is my VHDL source code format of the electronic lock, please review ah owners
VHDL_EPP
- 用VHDL编写的EPP通信协议，可以同时收发字节-EPP written in VHDL, communication protocol, you can also send and receive bytes
USB
- Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be