资源列表
sale22222222
- fpga verilog语言写的自动售货机-fpga verilog language written vending machine
lcd1602
- FPGA控制1602显示，内含vegilog程序-FPGA control 1602, the program includes vegilog
DDS
- FPGA产生DDS，未使用IP核，内含VERILOG程序-FPGA generates DDS, unused IP core, containing VERILOG program
example8-SigKeyCheck
- 键盘消抖 键盘消抖 来至于青创电子-Keyboard Keyboard debounce debounce keyboard debounce keyboard debounce
aes_pipe
- 流水线AES加密VHDL代码，代码规范，值得参考- The VHDL code of Pipelined AES encryption
CRC32
- CRC-32的VHDL程序。处理位宽为32位。-32 CRC-32 VHDL program
VHDL-CODE-for-adder-and-subtractor
- vhdl code for implementation of adder and subtractor on fpga
Using-Behavioural-Style
- vhdl code for implementation of multiplexer and demultiplexer on fpga
led
- 采用并行算法实现流水灯设计,其中top_module是顶层文件。-Flash light by parallel algorithm design
lcd_system
- LCD显示工程，其中包含了顶层文件和各个底层文件-LCD display project, which contains the top-level document and all underlying file
OV7670-initial
- 采用OV7670获取图像，并用IIC总线传输。里面有详细解释-Image obtained using the OV7670 , and use IIC bus. There are detailed explanations
syn_fifo
- 同步FIFO源代码，使用Verilog编写，用户可以轻松转换成VHDL。-Synchronized FIFO source code