资源列表
c8
- 无线通信，软件无线电，SDR的有关程序 很好啊，哥哥最近在研究这些，想做一个软件无线电的接收机啊，可惜，这个该死的网站，不让我下，吐血，哥哥决定贡献自己的东西，让技术不再隔阂-SDR OFDM QPSK ASK
LCDpinlvji
- 基于EP2C8Q208C8芯片的 LCD显示频率计程序-LCD display based on EP2C8Q208C8 chip frequency counter program
16bitADC
- verilog实现的16位模数转换器参考源代码-verilog to achieve 16-bit ADC reference source code
JPEG_verilog_code
- jpeg的verilog代码，只是编码部分的代码-jpeg of the verilog code, but coding part of the code
Focusing-system
- 应用FPGA以及VHDL编程语言、视频输入芯片SAA7111和输出芯片SAA7120实现对某固定图像的自动调焦-Application of FPGA and VHDL programming language, video input and output chip SAA7120 SAA7111 chip implementation of a fixed image of the auto-focus
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmab
celiang
- 使用FPGA完成超声波测距的功能，并在数码管上显示距离值。-Completed using ultrasonic ranging FPGA features and digital tube display distance value.
chengfaqi
- VHDL24*24位无符号乘法器，采用的是18*18结构-VHDL24*24-bit unsigned multiplier, used in the structure of 18* 18
beep
- 基于VHDL的蜂鸣器实验方案，已经通过验证，可放心使用-VHDL-based buzzer experimental program has been verified, safe for use
DA_TLC5620
- 基于VHDL的DA--TLC5620实验解决方案，可放心使用-Based on VHDL for DA- TLC5620 test solution can be freely used
PCIBridge
- pci bridge的verilog实现。-the verilog implemetion of PCI Bridge
TB_VHDL(adder)
- 加法器的VHDL源码及其对于的仿真Testbench 文件的编写-VHDL Code about adder for the "Simple Test Bench" example VHDL Code about adder for the "Simple Test Bench" example