资源列表
DM9000A
- DM900 100M物理层PHY芯片FPGA连接，fpga实现数据链路层功能，完成网络数据的收发-DM900 100M physical layer PHY chip FPGA connections, fpga data link layer, the completion of the network to send and receive data
verilog
- Different Verilog codes
13july
- according to that pdf file speifications it was designed by me(HANEESH).
e1_vhdl
- 用VHDL在FPGA内部实现E1的接口，适合通讯相关专业硬件开发使用-Within the FPGA implementation using VHDL E1 interface, the hardware for communications-related professional development to use
halfadder
- this the vhdl code for half adder with rtl view and simulations-this is the vhdl code for half adder with rtl view and simulations
da
- 单片机显示程序，能够接受来自DDS的信息，在液晶显示屏上显示当前输出波形和频率-Single-chip display program that can receive information from the DDS, the LCD display shows the current output waveform and frequency
sd_reader.rar
- SD卡读卡器模块的VHDL及软件驱动代码，可作为外设挂接在Avalon总线上。支持以SD模式、4线模式读取。在24MHz时钟驱动下读取速率可达8MByte/s,SD card reader module and software drivers VHDL code, can be articulated as a peripheral bus in Avalon. To support the SD model, 4-wire mode read. Driven by the 24MHz clo
alu_inverter
- 4bit ALU 利用vhdl语言编写的4位ALU 开发环境是在windows下-Band ALU using VHDL language prepared by the four ALU is a development environment under Windows
labviewtoexcel
- labview实现向excel指定位置书写
amba_verilog
- IC设计相关，arm内的AMBA桥实现的源码，verilog语言实现，
Verilog11
- 这个是用可编程器件进行仿真CPU的程序，大家一起分享拉-this device is programmable CPU simulation procedures to share with everyone Rafah
Projec2
- Delay Generator using VHDL