资源列表
clock_seg
- 用FPGA分频，做一个有时分秒的时钟，并用数码管显示-FPGA divide a sometimes every minute clock, and digital display
uart
- These codes are uart code written by verilog
Verilog
- Verilog数字系统设计教程(夏于闻)
Vga
- FPGA:VGA外设，实现VGA显示，VGA将会显示四种颜色，红、黄、蓝、绿-VGA peripherals, to achieve VGA display, VGA will display four colors, red, yellow, blue, green
uart
- 用Verilog HDL，实现的FPGA串口调试程序，已经在硬件上调试成功-With Verilog HDL, FPGA serial debugger implemented in hardware debugging has been successful
CPU-Project
- CPU设计，包含基本的指令集，能执行简单的程序。考虑了CPU，寄存器，存储器和指令集之间的关系。即读写寄存器，读写存储器和执行指令。-CPU design, including basic instruction set, to execute a simple program. Consider the CPU, registers, memory, and the relationship between instruction sets. That read and write regis
Verilog
- Verilog语言练习与讲解中文版.pdf-Verilog language exercises and explain the Chinese version. Pdf
FPGA
- EP3C16F484-datasheet以及EP3C16F484开发板的电路图-EP3C16F484-datasheet and EP3C16F484 development board circuit diagram
Altera_Device_Package_Information
- Altera 全部型号的FPGA及CPLD的配置指南,做PCB和FPGA开发人员参考较好-Altera all model FPGA and CPLD configuration guide, PCB and FPGA developer to do a better reference
01_run_led
- 跑马灯 用黑金开发板上的4个LED灯实现-Marquee black gold with four LED lights to achieve development board
dspbuilder
- ALTERA的dspbuilder教程，很详细-ALTERA DSP-BUILDER TO DEVELOP PROJECT