资源列表
iic_src
- 标准I2C总线时序实现，可以用来初始化I2C设备。-Standard I2C bus timing implementation, can be used to initialize the I2C device。
STATE1
- VHDL源代码，莫尔型状态机，使用VHDL语言编写
ram_fpgavhdl
- fpga vhdl实现一个标准双端口ram，可以作为单端口或者双端口用 -fpga vhdl achieve a standard dual-port ram, can be used as a single port or dual port with a
VGAverilog
- VGA scanning programm
CRC
- 能够实现S模式询问应答过程中的AP域编码模块，该模块完全按照260B协议编码-Mode S transponder can be achieved in the process of inquiry AP domain encoding module, which is fully in accordance with the 260B protocol encoding
LCD_test
- LCD_test主要是基于VHDL语言的LCD驱动，该程序很有参考价值
shiftreg
- 本代码实现了移位寄存器功能，初学者可借鉴学习-This code implements the shift register functions, beginners can learn to learn
rsvhdl_255_239
- a VHDL implementation of 255_239 reed solomon encoder.
colorlcd
- software para poner color a un lcd
backward
- verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
pwm
- 利用Verilog语言产生17路PWM波，控制17路舵机，可以作为IP核添加到AVALON总线上，在nios IDE里用C语言控制。-Using Verilog language production of 17 Road PWM signal to control 17 Servos, can be used as IP core to the AVALON bus, in the nios IDE in control with the C language.
ccd
- 一种ccd驱动程序，是verilog编写的。值得大家去学习。-A ccd driver is written in verilog. Worth to learn.