资源列表
hamming-code
- 含有四个模块，分别是（1）16位序列产生与分组模块 （2）编码模块 （3）加错模块 （4）译码与分组串行 -Contains four modules, namely (1) 16 sequence generation and grouping module (2) encoding module (3) wrong module (4) decoding and packet serial
ANALYSIS-OF-ALL-GATES
- ANALYSIS OF ALL GATE-ANALYSIS OF ALL GATESS
ps2
- 基于fpga的ps2键盘接口程序，通过它能够实现ps键盘的输入，里面的工程都完成，可以直接使用-Fpga based on the ps2 keyboard interface program through which to achieve ps keyboard input, which the projects are completed, can be used directly
testbench-from-perl
- 直接生成testbench的perl脚本-The software can produce test bench directly by perl
CIC
- Efficient CIC filter Implementation using VHDL
spi_verilog_master_slave_latest.tar
- 该项目从需要具有强大而简单的以VHDL编写的SPI接口核心开始，用于通用的FPGA到设备接口。 所产生的内核产生小而高效的电路，从非常慢的SPI时钟到超过50MHz的SPI时钟。-This project started the need to have robust yet simple SPI interface cores written in VHDL to use in generic FPGA-to-device interfacing. The resulting co
mult
- 4比特乘法器的vhdl实现，含modelsim测试文件-4-bit multiplier vhdl implementation, including the test file modelsim
sqrt_32bit_non_restoring
- a 32bit non-restoring square root with CSM in VHDL
cpu
- vhdl实现处理器基本功能，不包括流水线-VHDL to achieve the basic functions of the processor
74_alarm_clock
- 基于vhdl闹钟设计的实例，可以设置重置以及清零-vhdl alarm
SHA1
- SHA1 implementation on FPGA VHDL code