资源列表
SAR-Signal-Simulation-of-FPGA-based-fast-way
- 基于FPGA的SAR回波仿真快速实现方法SAR Signal Simulation of FPGA-based fast way-SAR Signal Simulation of FPGA-based fast way
DDS_dac9764
- verilog语言编写的DDS信号源，采用DAC9764-verilog DDS signal source language, using DAC9764
AD
- 基于FPGA的AD采集系统 用verilog编写 基于basys2开发板-FPGA AD verilog basys2
trafficagain
- 此程序是以VHDL来设计真实世界交通灯控制系统。经过下载到FPGA中调试，证明其真实可用。为了方便调用，特地将程序分成两个部分，包括主函数和一个数码管显示子程序。-This program is based on VHDL to design real-world traffic light control system. Been downloaded to the FPGA debugging, to prove its real available. Order to facilitate
VGA_Ctrl_VHDL
- 使用VHDL在Quartus II环境下实现对VGA接口显示器的控制，显示单色屏、彩条、棋盘格等。-The use of VHDL in the Quartus II environment to realize VGA interface display control, display monochrome screen, color bars, checkerboard grid and so on.
memery
- 通用存储器用Verilog hdl的实现，这是一个比较常用的源码，文档中有很详细的注释，初学者应该可以看懂。-Universal realization of the memory with Verilog hdl, this is a common source, the document very detailed notes, beginners should be able to understand.
FPGA--washer-control
- 能洗衣机控制器 具有多种功能切换 正转、反转、暂停等功能-Intelligent washing machine controller with multi-functional switch forward, reverse, pause, and other functions
project_4
- RGB 与YCbCr 颜色空间可以相互转化，此代码为YCbCr转RGB的实验代码-Display a signal, the resolution information can be seen as 1280 x 720 @ 60P, the display shows the standard 8-color vertical color bar
FFTBasedOnFPGALanguage
- 此程序用通过PFGA用VHDL语言实现了傅立叶变换，希望对大家有用
Firewall
- 硬件防火墙,verilog编写，已通过测试-Hardware firewall, verilog writing, has been tested
CVI-EZUSB-6.12
- FPGA开发板上的USB驱动程序，详情见解压目录文件-FPGA development board' s USB driver, extract the directory file details
PPT_timing-constraint
- PPT的形式演示Xilinx-ISE环境下时序约束的实现个结果