资源列表
Xilinx-ISE9.x-FPGA_CPLD(source).RAR
- Xilinx ISE9.x FPGA_CPLD一书的例程代码-Xilinx ISE9.x FPGA_CPLD a book routines code
DE2_TEST
- v代码源文件工程，用于测试友晶DE2开发板的各个功能，包括LCD，uart,key等-test of altera DE2 development board
HowToUseModelSim
- modelsim教程大全，几分相当翔实的modelsim学习材料 针对不同版本的modelsim都有讲解-Sort of learning materials very informative modelsim
OV7670_VGA
- OV7670_VGA 是摄像头OV7670跟VGA接口综合实验，实验现象是摄像头OV7670采集图片，通过VGA接口连接显示器，显示器可以实时显示摄像头的采集的图像-Quotient & lt RTI ID 0.0 & gt UFF0C u901A u8FC1VGA u63A5 u53E3 u8FDE u63A5 u663E u739A u5668 uFF0C u663E u793A u5668 u53EF u4E5 u5B9E u6
LCD12864IP
- 12864的IP，在艾米电子工作室的nios开发板上可执行-12864 of the IP, in the electronic studio nios Amy executable development board
8-DE2_70_demonstrations
- Altera DE2-70 开发板的（音频、鼠标、SD卡、VGA等实验），含源代码-Altera DE2-70 development board (audio, mouse, SD card, VGA and other experiments), with source code
JM86
- 3－8 VHDL 译码器 请
Quartus-9.0-books
- Quartus 9.0 tt_nios2_hardware_tutorial, embeded_handbook, n2cpu_nii72v1_HRDWR_REF, n2cpu_nii72v3_EMBD_PRFR, n2sw_nii72v2_SOFTWR_DEV, ug_nios2_getting_started
VGA_Display
- 通过VGA实现图片的显示。代码可用，已通过验证。(The display of the picture is realized by VGA. The code is available and has been verified.)
DPD_project
- 预失真算法中，包络解波部分的verilog代码，有部分错误-envelope calculation of DPD algorithm ，verilong HDL language
eluosi_game
- 这是一个基于NIOSII的俄罗斯方块游戏设计，是基于FPGA的，利用流模式DMA传输实现游戏。
PPT
- 大学EDA课程的课件以及课后部分习题的程序。包括最基本的加法器、计数器、LED显示以及部分高级VHDL程序。-University of EDA software programs, as well as some after-school exercise procedures. Including the most basic adder, counter, LED display, as well as some high-level VHDL procedures.