资源列表
fp_forFPGA
- 用于FPGA的Ｎ＋０.５分频代码，可以用来进行非整数分频！-N+0.5 for FPGA-frequency code, can be used for non-integer frequency!
FA_32
- Full adder 32 vhdl code
adc5510
- 使用VHDL语言编写的A/D转换程序，可在FPGA平台使用-Using the VHDL language in the A/D conversion process can be used in the FPGA platform
eda2
- 一个带记数使能，同步复位，带进位输出的增一 六位二进制记数器，记数结果由共阴极七段数码管显示-One with a count enable, synchronous reset, into digital output by 16 binary counter, counting the results from the common cathode seven-segment LED display
spi_dac
- driver for spi DAC in VHDL
New-folder
- Vhdl codes for D flip flop and so
VGA_Controller
- vga的行场信号驱动，由verilog编写，需提供25M的时钟驱动，为640*480的大小。-vga signal field lines driven by the verilog writing, must provide the 25M clock drive, the size of 640* 480.
shijinzhishumaguangundongxianshi
- 数电实验作业：十进制计数的数码管滚动显示(VHDL源程序)-Decimal count digital tube scroll (VHDL source)
pso-vhdl
- i have verilog and VHDL coding. please help me.
divider
- VERILOG编写的24位除法器代码核，是FPGA或者ASIC设计中的一核心计算模块。-VERILOG written 24 divider code nuclear FPGA or ASIC design in a core module.
FPGA_CIC
- 用Count计数法实现5级CIC滤波器，能够提前或者延迟一个周期采样。能综合-Implementation level 5 CIC filter with Count counting method, one can advance or delay the sampling period.
code
- 动态扫描键盘，然后把按键结果显示在LCD上，相关使用去抖功能-Dynamic scan keyboard, and then the key results are displayed on the LCD, the use of the shake function