资源列表
shudian
- DDS信号源设计，通过频率控制字k可以自动调节波形频率的输出-DDS signal source design, frequency control word k can automatically adjust the frequency of the waveform output
SOPCVer
- ALtium公司设计软件Altium Designer Summer08设计SOPC系统的详细指导教程，以实例的形式讲解了如何通过该软件设计FPGA系统。-ALtium design software company Altium Designer Summer08 detailed guidance system design SOPC tutorial examples to explain how the form of software design through the FPGA s
wendu
- 基于FPGA和DHT11的温湿度采集系统-Acquisition system based on FPGA and DHT11 temperature and humidity
DE2_NET
- altera DE2开发板和网络通信的例程，使用了nios ii系统-altera DE2 development board and network communication routines, using nios ii system
jtagdownload
- alter cpld下载线制作方法集合，自己做就行，不用花40元去买了-alter cpld download cable production method of collection, make their own on the line, do not have to spend 40 yuan to buy a
VHDL
- it s aVHDL descr iption
sine
- FPGA的IP核实现发出高质量正弦波的工程-Issue of FPGA IP cores to achieve high-quality sine wave
uC_OS-II-Porting-to-S3E
- 在Spartan-3 Starter上移植μC/OS-II的完整笔记，也可作为EDK环境下所有其他型号FPGA的μC/OS-II移植参考-COM609_μC_OS-II Porting to Spartan-3 Starter Board
ADPCMverilog
- ADPCM编码的Verilog编码实现，代码有详细的注释，编译通过-ADPCM coding Verilog code, the code has detailed notes, compiled by
equivalent_sample----vhdl
- 基于FPGA的数字示波器的整体设计与实现的各种方案，采用等精读测频率，数据的采集等多项技术的分析-FPGA-based digital oscilloscope of the overall design and implementation of various programs, such as intensive use of the frequency measurement, data collection and many other technical analysis
SystemC片上系统设计源代码
- SystemC片上系统设计源代码 同名书的附送代码，具体case随书获取
Verilog_classic_documentation
- Verilog经典文档资料Verilog classic documentation很不错的经典资料-Verilog classic documentation Verilog classic documentation is very good classical information