资源列表
Four_MB_FSL
- 基于Xilinx Microblaze的四核嵌入式系统设计源码-embedded system design based on xilinx Microblaze core
zxs4826_clock
- 基于QUARTUS2的电子时钟设计程序，程序简单，是课程设计的题目，可以作为有力参考。-Based QUARTUS2 electronic clock design procedure is simple, is the subject of curriculum design, can serve as a strong reference.
zxs4826_yuequbofang
- 基于Quartus2的乐曲播放电路，可以播放多首乐曲，代码清晰简单，是课程设计题目。-Quartus2 based music playback circuitry, can play more songs, the code clear and straightforward, curriculum design topics.
zxs4826_chuzuchejifei
- 基于Quartus2的出租车计费软件设计，功能齐全，课程设计题目。-Based Quartus2 taxi billing software design, functional curriculum design topics.
WM8731 initialization file
- I2C initial WM8731 codec
Group_AES_16
- VHDL 描述 AES,16位。low area。可以仿真。-VHDL descr iption of AES, 16 place. low area. Can be simulated.
AESbyHGY_128
- VHDL描述AES加密系统。加密十次。与完成并可以成功仿真。-VHDL descr iption AES encryption systems. Encryption ten times. And complete and can be successfully simulated.
CRC
- FPGA中并行实现CRC-CCITT标准的循环冗余校验码的生成-FPGA to achieve CRC-CCITT standard parallel cyclic redundancy check code generation
CRC_16
- FPGA中并行实现CRC-16标准的循环冗余校验码的生成-FPGA to achieve CRC-16 standard parallel cyclic redundancy check code generation
lab_cor_8
- cordic算法实现8次迭代计算sin(x)-8 iterations cordic algorithm computing sin (x)
the-design-of-states-machine
- 状态的设计教程，主要介绍了复杂时序电路的设计方式！-the design of states machine
AD7923
- AD7923的FPGA控制测试可用，用verilog写的-AD7923 FPGA-controlled test is available, use verilog to write