资源列表
pailiezuhe
- 基于fpga的多功能数字钟，并且用1602显示，24小时，可调时，分，秒-Fpga-based multi-function digital clock, and with the 1602 show, 24 hours, adjustable hours, minutes, seconds
xapp1015
- SDI接口的VHDL实现，XILINX官网的设计参考-SDI interface VHDL realize XILINX official website design reference
DE2_115_PS2_DEMO
- DE2-115开发板的PS2的Verilog HDL语言设计-The DE2-115 development board of the PS2 Verilog HDL language design
DE2_115_NIOS_HOST_MOUSE_VGA
- DE2-115开发板的verilog HDL的VGA设计-DE2-115 development board VGA verilog HDL design
DE2_115_NIOS_DEVICE_LED
- DE2-115开发板的LED灯设计 Verilog HDL语言编写-DE2-115 development board LED lamp design Verilog HDL language
DE2_115_Audio
- DE2-115开发板音频录放verilog HDL代码-DE2-115 development board audio recorders verilog HDL code
ADD_SUB
- floating point fused add-subtract unit
SUB_UNIT
- floating point subtract unit
ADD_UNIT
- floating point add unit
FULL
- Full code for fused floating point operations.
CopperHoleTest3.17
- 一个简单的状态机，用来实现一个操作流程和8段码的显示及老化控制-A simple state machine, used to implement the display of an operation process, and 8 code
edashuzipinlvji
- EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计-EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design