资源列表
fir48
- 48阶FIR滤波器的verilog，包含测试文件-48-order FIR filter verilog, including test paper
fir16.v
- 16阶FIR滤波器设计的verilog代码-Verilog 16-order FIR filter
tdc
- 线性伸展TDC的verilog，包含门级网表-TDC linear stretch of verilog, includes gate-level netlist
an489
- 用于MAXII系列EPM240T100 CPLD中UMF使用的例程及说明文档-Routines and documentation for MAXII series CPLD used in UMF
dcm100
- ADC12D800 source code
rgstr
- ADC12D800 source code
adc12d1000_rfrb
- ADC12D800 source code
AM
- 实验利用matlab 软件实现直接数字频率合成-Experiments using matlab software direct digital frequency synthesis
Verilog_digital_clock
- Digital clock using Quartus9.1 platform, using Verilog language, to share to everyone
new_uart
- 串口的调试程序，可用串口调试助手对串口进行收发数据的检测-Debugger serial, serial debugging assistant available to detect the serial data transceiver
Elevator_controller
- Digital clock using Quartus9.1 platform, using Verilog language, to share to everyone
gpmc
- GPMC模块源代码。适合初学者的FPGA学习。-GPMC module source code. FPGA for beginners to learn.