资源列表
FPGA-verilog-digital-clock
- FPGAverilog数字时钟,基于quartal ii 下的数字时钟电路程序-FPGA verilog digital clock
USBLight-LED-test
- 基于FPGA的USB调试LED灯的代码,包括上位机代码、下位机代码。-USB debugging leds code based on FPGA, including PC and PC code code.
USBButton-control-input-test
- 基于FPGA的USB调试代码,包括上位机代码、驱动程序、下位机代码。-USB debugging code based on FPGA,including PC code, driver, application code.
USB_FPGA_IOtest
- 基于FPGA的USB调试代码,包括上位机代码、驱动程序、应用程序、下位机代码。-USB debugging code based on FPGA,including PC code, driver and PC, application code.
SLAVE-FIFO16-test
- 基于FPGA的USB调试代码,包括上位机代码、驱动程序、应用程序、下位机代码。-USB debugging code based on FPGA, including PC code, driver and PC, application code.
SLAVE-FIFO8test
- 用于FPGA板子上的USB调试,包括上位机、驱动程序、下位机程序、应用程序。-Used for USB debugging, including PC, and PC driver program and application.
one-key-multifunction_verilog
- 采用FPGA来实现的一键多能算法,Verilog 编码,包含testbench,有详细的解释说明。-Using FPGA to implement one key multifunction algorithm, Verilog coding, including testbench, a detailed explanation.
Watch_Game_0729
- 基于xilinx virtex5的猜数游戏+LCD显示设计,包含完整的ISE工程文件,代码全部用verilog编写,有说明文档。-Based on xilinx virtex5, the guessing game plus LCD display design, including complete ISE project file, all code written in verilog, documents.
LCD1602_Verilog
- 实现字符串的显示,左右移动,换行等操作。-to show string,and move from left to right ,changeline.
myFPGA
- FPGA芯片测量两路信号的相位差,将相差信号以脉冲数的形式发出-FPGA measure the difference between two signals’signal
modelsimPdebussy-batch-processing
- 内容包括采用Windows批处理方式高效执行Verilog仿真验证的方法,采用Modelsim+debussy联合仿真,里面包含一个加法器实例,批处理文件,仿真指令等。-Included with Windows batch efficient implementation of Verilog simulation method, using Modelsim+debussy co-simulation, which contains an example of an adder, batch
15-vlsi
- Asynchronous fine grain power gated logic paper get code and logic static used
