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文件名称:FPGA

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    9.15mb
  • 已下载：
    0次
  • 提 供 者：
    sur***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

Learnado Spectrum for simulation software
相关搜索： LCD16X2A EvaLBoard EB-1

(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA/FPGA Processors/AudioCodec_FlashMemory - TSK165/FPGA_AudioCodec_Flash.PrjFpg
FPGA/FPGA Processors 32-bit/Microblaze VGA/MICROBLAZE_VGA.SchDoc
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/Embedded/hardware.h
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/Embedded/main.c
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/Embedded/Multiplier.PrjEmb
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/Multiplier.Vhd
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/TSK3000_Signed_Hardware_Multiplier.Constraint
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/TSK3000_Signed_Hardware_Multiplier.PrjFpg
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/TSK3000_Signed_Hardware_Multiplier.PrjFpgStructure
FPGA/FPGA Processors 32-bit/TSK3000 Signed Hardware Multiplier/TSK3000_Signed_Hardware_Multiplier.SchDoc
FPGA/Library/Edif/Actel/Proasic3/TSK3000A_MDU.zip
FPGA/Library/Edif/Actel/Proasic3e/Can_w.zip
FPGA/Library/Edif/Actel/Proasic3e/Emac32.zip
FPGA/Library/Edif/Actel/Proasic3e/Emac8.zip
FPGA/Library/Edif/Actel/Proasic3e/Emac8_md.zip
FPGA/Library/Edif/Actel/Proasic3e/Emac8_md_w.zip
FPGA/Library/Edif/Actel/Proasic3e/Emac8_w.zip
FPGA/Library/Edif/Actel/Proasic3e/Fpga_startup16.zip
FPGA/Library/Edif/Actel/Proasic3e/Fpga_startup32.zip
FPGA/Library/Edif/Actel/Proasic3e/Fpga_startup8.zip
FPGA/Library/Edif/Actel/Proasic3e/Generic.zip
FPGA/Library/Edif/Actel/Proasic3e/I2cm.zip
FPGA/Library/Edif/Actel/Proasic3e/Iob_4x16.zip
FPGA/Library/Edif/Actel/Proasic3e/Keypada.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_16.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_1k16.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_1k8.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_2k16.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_2k8.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_4k16.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_4k8.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_8.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_cfg16.zip
FPGA/Library/Edif/Actel/Proasic3e/Lax_cfg8.zip
FPGA/Library/Edif/Actel/Proasic3e/Lcd16x2a.zip
FPGA/Library/Edif/Actel/Proasic3e/Max1104_dac.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtio1x16.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtio1x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtio1x8.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtio2x16.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtio2x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtio2x8.zip
FPGA/Library/Edif/Actel/Proasic3e/PRTIO4x16.ZIP
FPGA/Library/Edif/Actel/Proasic3e/Prtio4x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtio4x8.zip
FPGA/Library/Edif/Actel/Proasic3e/PRTIOX1x16.ZIP
FPGA/Library/Edif/Actel/Proasic3e/Prtiox1x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtiox1x8.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtiox2x16.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtiox2x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtiox2x8.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtiox4x16.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtiox4x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prtiox4x8.zip
FPGA/Library/Edif/Actel/Proasic3e/Prto1x16.zip
FPGA/Library/Edif/Actel/Proasic3e/Prto1x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prto1x8.zip
FPGA/Library/Edif/Actel/Proasic3e/PRTO2x16.ZIP
FPGA/Library/Edif/Actel/Proasic3e/Prto2x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prto2x8.zip
FPGA/Library/Edif/Actel/Proasic3e/PRTO4x16.ZIP
FPGA/Library/Edif/Actel/Proasic3e/Prto4x32.zip
FPGA/Library/Edif/Actel/Proasic3e/Prto4x8.zip
FPGA/Library/Edif/Actel/Proasic3e/Ps2.zip
FPGA/Library/Edif/Actel/Proasic3e/Srl0.zip
FPGA/Library/Edif/Actel/Proasic3e/Tmr3.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk165a.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk165a_d.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk165b.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk165b_d.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk165c.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk165c_d.zip
FPGA/Library/Edif/Actel/Proasic3e/TSK3000A_MCU.zip
FPGA/Library/Edif/Actel/Proasic3e/TSK3000A_MDU.zip
FPGA/Library/Edif/Actel/Proasic3e/TSK3000A_OCDS.zip
FPGA/Library/Edif/Actel/Proasic3e/TSK3000A_Shift_Barrel.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk51a.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk51a_d.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk52a.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk52a_d.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk52b_w.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk52b_wd.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk80a.zip
FPGA/Library/Edif/Actel/Proasic3e/Tsk80a_d.zip
FPGA/Library/Edif/Actel/Proasic3e/Vga.zip
FPGA/Library/Edif/Actel/Proasic3e/Wb_pwm8.zip
FPGA/Library/Edif/Actel/Proasic3e/Wb_pwmx.zip
FPGA/Library/Edif/Actel/Proasic3e/Wb_uart8.zip
FPGA/Library/Fpga/Evaluation Board Constraint Files/EB1_XC3S1000-4FG456.Constraint
FPGA/Library/Fpga/FPGA Peripherals.IntLib
FPGA/Library/Fpga/NB1 Constraint Files/Xilinx FPGA/NB1_6_XC2V1000-4FG456_2xSRAM_SDRAM.Constraint
FPGA/Library/Fpga/NB1 Constraint Files/Xilinx FPGA/NB1_6_XC3S1000-FG456_2xSRAM_SDRAM.Constraint
FPGA/Library/Molex/Molex Modular Jack Bottom.IntLib
FPGA/Library/Molex/Molex Modular Jack Right Angle.IntLib
FPGA/Library/Molex/Molex Modular Jack Vertical.IntLib
FPGA/LiveDesign Evaluation Board/EvalBoar

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