为了将数据大小和处理工艺的混合影响并入到通讯总线，这篇论文为通讯合成提出一个扩展的模型。这个提出的模型在数据大小和工艺差异的同时执行片上通讯总线合成和电压调节-In order

to incorporate the combined effects of the data size and the process variations on the

performance of communication buses, this thesis proposes an extended model for communication

synthesis. The proposed model simultaneously performs on-chip communication

bus synthesis and voltage scaling under data size and process variations.