整个系统以CPLD为核心逻辑控制器件，配以外围测试及试验电路：显示、时钟信号产生电路、蜂鸣器电路和ByteBlaster的数据变换电路，构成正负脉宽数控调制信号发生器。基于CPLD逻辑控制器件构成的正负脉宽数控调制信号发生器是一个单片系统,整个PWM信号控制所需的各种功能都可由CPLD来实现。-The entire system to the core logic control CPLD devices, together with the external test and the test circuit: display, clock signal generation circuit, buzzer circuit and ByteBlaster data converter, NC constitute positive and negative pulse width modulated signal generator. CPLD logic control device based on the positive and negative pulse width modulation signal generator is a numerical control system on chip, the PWM signals control the various functions required by the CPLD can be achieved.