A technique for constructing a processor from modules,each of which processes one bit-field or “slice” of an operand.Bit slice processors usually consist of an ALU of 1,2,4 or 8-bits and control lines including carry or overflow signals usually internal to the CPU.For example,two 4-bit ALUs could be arranged side by side,with control lines between them,to form an 8-bit ALU.Asequencer executes a program to provide data and control signals.Slice construction conceptually proceeds in two phases.(1) detecting the slice, and (2)extracting the instructions for storage in the slice cache.Detection is done by propagating a dependance vector or DV as follows:Starting from the candidate load send its DV to the immediate preceding slicer entry.Entry checks the bit of the incoming DV .Because it is zero,it just propagates the DV as is to entry 8-A technique for constructing a processor from modules,each of which processes one bit-field or “slice” of an operand.Bit slice processors usually consist of an ALU of 1,2,4 or 8-bits and control lines including carry or overflow signals usually internal to the CPU.For example,two 4-bit ALUs could be arranged side by side,with control lines between them,to form an 8-bit ALU.Asequencer executes a program to provide data and control signals.Slice construction conceptually proceeds in two phases.(1) detecting the slice, and (2)extracting the instructions for storage in the slice cache.Detection is done by propagating a dependance vector or　DV as follows:Starting from the candidate load send its DV to the immediate preceding slicer entry.Entry checks the bit of the incoming DV .Because it is zero,it just propagates the DV as is to entry 8