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文件名称:crossroute-R4
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As integrated circuits are migrated to more advanced technologies, it
has become clear that crosstalk is an important physical
phenomenon that must be taken into account. Crosstalk has
primarily been a concern for ASICs, multi-chip modules, and
custom chips, however, it will soon become a concern in FPGAs. In
this paper, we describe the first published crosstalk-aware router that
targets FPGAs. We show that, in a representative FPGA architecture
implemented in a 0.18μm technology, the average routing delay in
the presence of crosstalk can be reduced by 7.1 compared to a
router with no knowledge of crosstalk. About half of this
improvement is due to a tighter delay estimator, and half is due to an
improved routing algorithm.-As integrated circuits are migrated to more advanced technologies, it
has become clear that crosstalk is an important physical
phenomenon that must be taken into account. Crosstalk has
primarily been a concern for ASICs, multi-chip modules, and
custom chips, however, it will soon become a concern in FPGAs. In
this paper, we describe the first published crosstalk-aware router that
targets FPGAs. We show that, in a representative FPGA architecture
implemented in a 0.18μm technology, the average routing delay in
the presence of crosstalk can be reduced by 7.1 compared to a
router with no knowledge of crosstalk. About half of this
improvement is due to a tighter delay estimator, and half is due to an
improved routing algorithm.
has become clear that crosstalk is an important physical
phenomenon that must be taken into account. Crosstalk has
primarily been a concern for ASICs, multi-chip modules, and
custom chips, however, it will soon become a concern in FPGAs. In
this paper, we describe the first published crosstalk-aware router that
targets FPGAs. We show that, in a representative FPGA architecture
implemented in a 0.18μm technology, the average routing delay in
the presence of crosstalk can be reduced by 7.1 compared to a
router with no knowledge of crosstalk. About half of this
improvement is due to a tighter delay estimator, and half is due to an
improved routing algorithm.-As integrated circuits are migrated to more advanced technologies, it
has become clear that crosstalk is an important physical
phenomenon that must be taken into account. Crosstalk has
primarily been a concern for ASICs, multi-chip modules, and
custom chips, however, it will soon become a concern in FPGAs. In
this paper, we describe the first published crosstalk-aware router that
targets FPGAs. We show that, in a representative FPGA architecture
implemented in a 0.18μm technology, the average routing delay in
the presence of crosstalk can be reduced by 7.1 compared to a
router with no knowledge of crosstalk. About half of this
improvement is due to a tighter delay estimator, and half is due to an
improved routing algorithm.
相关搜索： FPGA router
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