此源代码是基于Verilog语言的七人投票表决器 、2 个 8 位数相乘 、8 位二进制数的乘法 、同一循环的不同实现方式、使用了`include 语句的 16 位加法器 、条件编译、加法计数器中的进程、任务、测试、函数、用函数和 case语句描述的编码器、阶乘运算函数、测试程序 、顺序执行、并行执行，特别是七人投票表决器，这是我目前发现的最优的用硬件描述的源代码。-The Verilog language source code is based on the seven-vote, and 2 8-digit multiplication, 8-bit binary number multiplication, the same cycle of different implementations, using the `include statements of the 16-bit adder, conditional compilation, addition counter processes, tasks, test, function, function and case statement with the descr iption of the encoder, computing the factorial function, test procedures, the order of execution, parallel execution, especially the seven-vote, this is the most I have found so far excellent descr iption of the source code with the hardware.