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文件名称:counter
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- 上传时间：2012-11-16
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文件大小：19.46kb
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已下载：0次
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这是带清零端的8位二进制计数器，是用verilog hdl语言编写的-This is the side with a clear 8-bit binary counter, is written with the verilog hdl
(系统自动生成,下载前可以参看下载内容)
下载文件列表
counter/counter.cr.mti
counter/counter.mpf
counter/counter.v.bak
counter/counter_test.v
counter/counter_test.v.bak
counter/couter_8.v
counter/transcript
counter/vish_stacktrace.vstf
counter/vsim.wlf
counter/vsim.wlf.temp
counter/work/counter/verilog.asm
counter/work/counter/_primary.dat
counter/work/counter/_primary.vhd
counter/work/test/verilog.asm
counter/work/test/_primary.dat
counter/work/test/_primary.vhd
counter/work/_info
counter/work/counter
counter/work/test
counter/work
counter
counter/counter.mpf
counter/counter.v.bak
counter/counter_test.v
counter/counter_test.v.bak
counter/couter_8.v
counter/transcript
counter/vish_stacktrace.vstf
counter/vsim.wlf
counter/vsim.wlf.temp
counter/work/counter/verilog.asm
counter/work/counter/_primary.dat
counter/work/counter/_primary.vhd
counter/work/test/verilog.asm
counter/work/test/_primary.dat
counter/work/test/_primary.vhd
counter/work/_info
counter/work/counter
counter/work/test
counter/work
counter
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