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文件名称:rs_231_modified

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  • 上传时间:
    2012-11-16
  • 文件大小:
    1.21mb
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Reed solomon codes (231 message information)
(系统自动生成,下载前可以参看下载内容)

下载文件列表

rs_231_modified/berk.v
rs_231_modified/chein.v
rs_231_modified/data.v
rs_231_modified/decode.v
rs_231_modified/encode.v
rs_231_modified/inverse.v
rs_231_modified/memory.v
rs_231_modified/memory.v.bak
rs_231_modified/rs231.cr.mti
rs_231_modified/rs231.mpf
rs_231_modified/synd.v
rs_231_modified/top1.v
rs_231_modified/top1.v.bak
rs_231_modified/top_tb.v
rs_231_modified/top_tb.v.bak
rs_231_modified/vsim.wlf
rs_231_modified/WAVES/231_ENCODED_MESSAGES.JPG
rs_231_modified/WAVES/CODE_WORD_LENGTH.JPG
rs_231_modified/WAVES/DECODED_OUTPUT.JPG
rs_231_modified/WAVES/DECODER_ENABLED.JPG
rs_231_modified/WAVES/ENCODER_ENABLE_STARTS_ENCODING.JPG
rs_231_modified/WAVES/ERROR_VALUES.JPG
rs_231_modified/WAVES/NOISE_VALUES.JPG
rs_231_modified/WAVES/STARTED_APPENDING_PARITY.JPG
rs_231_modified/work/decode/verilog.asm
rs_231_modified/work/decode/_primary.dat
rs_231_modified/work/decode/_primary.vhd
rs_231_modified/work/encode/verilog.asm
rs_231_modified/work/encode/_primary.dat
rs_231_modified/work/encode/_primary.vhd
rs_231_modified/work/inverse/verilog.asm
rs_231_modified/work/inverse/_primary.dat
rs_231_modified/work/inverse/_primary.vhd
rs_231_modified/work/mem/verilog.asm
rs_231_modified/work/mem/_primary.dat
rs_231_modified/work/mem/_primary.vhd
rs_231_modified/work/msgrom/verilog.asm
rs_231_modified/work/msgrom/_primary.dat
rs_231_modified/work/msgrom/_primary.vhd
rs_231_modified/work/multiply/verilog.asm
rs_231_modified/work/multiply/_primary.dat
rs_231_modified/work/multiply/_primary.vhd
rs_231_modified/work/rsdec_berl/verilog.asm
rs_231_modified/work/rsdec_berl/_primary.dat
rs_231_modified/work/rsdec_berl/_primary.vhd
rs_231_modified/work/rsdec_berl_multiply/verilog.asm
rs_231_modified/work/rsdec_berl_multiply/_primary.dat
rs_231_modified/work/rsdec_berl_multiply/_primary.vhd
rs_231_modified/work/rsdec_chien/verilog.asm
rs_231_modified/work/rsdec_chien/_primary.dat
rs_231_modified/work/rsdec_chien/_primary.vhd
rs_231_modified/work/rsdec_chien_scale0/verilog.asm
rs_231_modified/work/rsdec_chien_scale0/_primary.dat
rs_231_modified/work/rsdec_chien_scale0/_primary.vhd
rs_231_modified/work/rsdec_chien_scale1/verilog.asm
rs_231_modified/work/rsdec_chien_scale1/_primary.dat
rs_231_modified/work/rsdec_chien_scale1/_primary.vhd
rs_231_modified/work/rsdec_chien_scale10/verilog.asm
rs_231_modified/work/rsdec_chien_scale10/_primary.dat
rs_231_modified/work/rsdec_chien_scale10/_primary.vhd
rs_231_modified/work/rsdec_chien_scale11/verilog.asm
rs_231_modified/work/rsdec_chien_scale11/_primary.dat
rs_231_modified/work/rsdec_chien_scale11/_primary.vhd
rs_231_modified/work/rsdec_chien_scale12/verilog.asm
rs_231_modified/work/rsdec_chien_scale12/_primary.dat
rs_231_modified/work/rsdec_chien_scale12/_primary.vhd
rs_231_modified/work/rsdec_chien_scale13/verilog.asm
rs_231_modified/work/rsdec_chien_scale13/_primary.dat
rs_231_modified/work/rsdec_chien_scale13/_primary.vhd
rs_231_modified/work/rsdec_chien_scale14/verilog.asm
rs_231_modified/work/rsdec_chien_scale14/_primary.dat
rs_231_modified/work/rsdec_chien_scale14/_primary.vhd
rs_231_modified/work/rsdec_chien_scale15/verilog.asm
rs_231_modified/work/rsdec_chien_scale15/_primary.dat
rs_231_modified/work/rsdec_chien_scale15/_primary.vhd
rs_231_modified/work/rsdec_chien_scale16/verilog.asm
rs_231_modified/work/rsdec_chien_scale16/_primary.dat
rs_231_modified/work/rsdec_chien_scale16/_primary.vhd
rs_231_modified/work/rsdec_chien_scale17/verilog.asm
rs_231_modified/work/rsdec_chien_scale17/_primary.dat
rs_231_modified/work/rsdec_chien_scale17/_primary.vhd
rs_231_modified/work/rsdec_chien_scale18/verilog.asm
rs_231_modified/work/rsdec_chien_scale18/_primary.dat
rs_231_modified/work/rsdec_chien_scale18/_primary.vhd
rs_231_modified/work/rsdec_chien_scale19/verilog.asm
rs_231_modified/work/rsdec_chien_scale19/_primary.dat
rs_231_modified/work/rsdec_chien_scale19/_primary.vhd
rs_231_modified/work/rsdec_chien_scale2/verilog.asm
rs_231_modified/work/rsdec_chien_scale2/_primary.dat
rs_231_modified/work/rsdec_chien_scale2/_primary.vhd
rs_231_modified/work/rsdec_chien_scale20/verilog.asm
rs_231_modified/work/rsdec_chien_scale20/_primary.dat
rs_231_modified/work/rsdec_chien_scale20/_primary.vhd
rs_231_modified/work/rsdec_chien_scale21/verilog.asm
rs_231_modified/work/rsdec_chien_scale21/_primary.dat
rs_231_modified/work/rsdec_chien_scale21/_primary.vhd
rs_231_modified/work/rsdec_chien_scale22/verilog.asm
rs_231_modified/work/rsdec_chien_scale22/_primary.dat
rs_231_modified/work/rsdec_chien_scale22/_primary.vhd
rs_231_modified/work/rsdec_chien_scale23/verilog.asm
rs_231_modified/work/rsdec_chien_scale23/_primary.dat
rs_231_modified/work/rsdec_chien_scale23/_primary.vhd
rs_231_modified/work/rsdec_chien_scale24/verilog.asm
rs_231_modified/work/rsdec_chien_scale24/_primary.dat
rs_231_modified/work/rsdec_chien_scale24/_primary.vhd
rs_231_modified/work/rsdec_chien_scale25/verilog.asm
rs_231_modified/work/rsdec_chien_scale25/_primary.dat
rs_231_modified/work/rsdec_chien_scale25/_primary.vhd
rs_231_modified/work/rsdec_chien_scale26/verilog.asm
rs_231_modified/work/rsdec_chien_scale26/_primary.dat
rs_231_modified/work/rsdec_chien_

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