文件名称:VerilogHDL_Emample
-
所属分类:
- 标签属性:
- 上传时间:2012-11-16
-
文件大小:680.58kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
其他说明:
文中实例基本都不依赖实际具体的硬件,可以在任何厂家任何系列的FPGA/CPLD下综合使用(如Altera等,只要资源充足),还可以利用Synoposy公司的工艺库影射到ASIC,完全可以当作软IPCore使用。
-Other notes: the text does not rely on practical and concrete examples of basic hardware, manufacturers of any series in any of the FPGA/CPLD under the integrated use (such as Altera, as long as adequate resources), but also the company' s technology can be used Synoposy library mapping to ASIC, completely can be used as a soft IPCore.
文中实例基本都不依赖实际具体的硬件,可以在任何厂家任何系列的FPGA/CPLD下综合使用(如Altera等,只要资源充足),还可以利用Synoposy公司的工艺库影射到ASIC,完全可以当作软IPCore使用。
-Other notes: the text does not rely on practical and concrete examples of basic hardware, manufacturers of any series in any of the FPGA/CPLD under the integrated use (such as Altera, as long as adequate resources), but also the company' s technology can be used Synoposy library mapping to ASIC, completely can be used as a soft IPCore.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VerilogHDL_Emample.pdf
1999-2046 搜珍网 All Rights Reserved.
本站作为网络服务提供者,仅为网络服务对象提供信息存储空间,仅对用户上载内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。
