ABSTRACT:

Low power consumption and smaller area are some of the most important criteria for the

fabrication of DSP systems and high performance systems. Optimizing the speed and

area of the multiplier is a major design issue. However, area and speed are usually

conflicting constraints so that improving speed results mostly in larger areas. In our

project we try to determine the best solution to this problem by comparing a few

multipliers.

This project presents an efficient implementation of high speed multiplier using the shift

and add method, Radix_2, Radix_4 modified Booth multiplier algorithm. In this project

we compare the working of the three multiplier by implementing each of them separately

in FIR filter.