This paper presents the way of speeding up the route

from the oretical design with Simulink/Matlab, via

behavioral simulation in fixed-point arithmetic to the

implementation on either FPGA or custom silicon. This has

been achieved by porting the netlist of the Simulink system

descr iption into the VHDL. At the first instance, the

Simulink-to-VHDL converter has been designed to use

structural VHDL code to describe system interconnections,

allowing simple behavioral descr iptions for basic blocks.

The resulting VHDL code delivers bit-true result when

compared to the equivalent fixed-point Simulink model

simulations.-This paper presents the way of speeding up the route

from the theoretical design with Simulink/Matlab, via

behavioral simulation in fixed-point arithmetic to the

implementation on either FPGA or custom silicon.　This has

been achieved by porting the netlist of the Simulink system

descr iption into the VHDL. At the first instance, the

Simulink-to-VHDL converter has been designed to use

structural VHDL code to describe system interconnections,

allowing simple behavioral descr iptions for basic blocks.

The resulting VHDL code delivers bit-true result when

compared to the equivalent fixed-point Simulink model

simulations.