文件名称:synth_fft
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- 上传时间：2012-11-16
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fftprocessing can complete 256 pointsFFT.-Hardware Descr iption Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools having good effect in the system design，Meanwhile，it adopted the core provided by Xilinx／nc. improving the design efficiency．The whole design which is implemented inXC2S600E device relied on ISE and advanced hierarchy design mind．Furthermore，it is simulated and verified．The frequency attains to 40.64MHz．this paper aims at demonstration the applying FPGA to FFT signal processing can complete 256 pointsFFT.
相关搜索： fft verilog xilinx
fft hdl
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下载文件列表
synth_fft/and_gates.vhd
synth_fft/baseindex.vhd
synth_fft/but.vhd
synth_fft/butter_lib.vhd
synth_fft/comm.txt
synth_fft/control2.vhd
synth_fft/controller.vhd
synth_fft/counter.vhd
synth_fft/cycles_but.vhd
synth_fft/dff.vhd
synth_fft/divide.vhd
synth_fft/FLOAT2.PIF
synth_fft/FLOAT_RE.TXT
synth_fft/IEEE_TO_.PIF
synth_fft/ioadd.vhd
synth_fft/iod_staged.vhd
synth_fft/lblock.vhd
synth_fft/mult.vhd
synth_fft/multiply.vhd
synth_fft/mux_add.vhd
synth_fft/mux_but.vhd
synth_fft/negate.vhd
synth_fft/normalize.vhd
synth_fft/out_result.vhd
synth_fft/print.vhd
synth_fft/ram.vhd
synth_fft/ram_shift.vhd
synth_fft/rblock.vhd
synth_fft/result.txt
synth_fft/rom.vhd
synth_fft/romadd_gen.vhd
synth_fft/rom_ram.vhd
synth_fft/shift2.vhd
synth_fft/simili.lst
synth_fft/stage.vhd
synth_fft/subtractor.vhd
synth_fft/summer.vhd
synth_fft/swap.vhd
synth_fft/synth_main.vhd
synth_fft/synth_test.vhd
synth_fft/synth_fft/and_gates.vhd
synth_fft/synth_fft/baseindex.vhd
synth_fft/synth_fft/but.vhd
synth_fft/synth_fft/butter_lib.vhd
synth_fft/synth_fft/comm.txt
synth_fft/synth_fft/control2.vhd
synth_fft/synth_fft/controller.vhd
synth_fft/synth_fft/counter.vhd
synth_fft/synth_fft/cycles_but.vhd
synth_fft/synth_fft/dff.vhd
synth_fft/synth_fft/divide.vhd
synth_fft/synth_fft/FLOAT2.PIF
synth_fft/synth_fft/FLOAT_RE.TXT
synth_fft/synth_fft/IEEE_TO_.PIF
synth_fft/synth_fft/ioadd.vhd
synth_fft/synth_fft/iod_staged.vhd
synth_fft/synth_fft/lblock.vhd
synth_fft/synth_fft/mult.vhd
synth_fft/synth_fft/multiply.vhd
synth_fft/synth_fft/mux_add.vhd
synth_fft/synth_fft/mux_but.vhd
synth_fft/synth_fft/negate.vhd
synth_fft/synth_fft/normalize.vhd
synth_fft/synth_fft/out_result.vhd
synth_fft/synth_fft/print.vhd
synth_fft/synth_fft/ram.vhd
synth_fft/synth_fft/ram_shift.vhd
synth_fft/synth_fft/rblock.vhd
synth_fft/synth_fft/result.txt
synth_fft/synth_fft/rom.vhd
synth_fft/synth_fft/romadd_gen.vhd
synth_fft/synth_fft/rom_ram.vhd
synth_fft/synth_fft/shift2.vhd
synth_fft/synth_fft/simili.lst
synth_fft/synth_fft/stage.vhd
synth_fft/synth_fft/subtractor.vhd
synth_fft/synth_fft/summer.vhd
synth_fft/synth_fft/swap.vhd
synth_fft/synth_fft/synth_main.vhd
synth_fft/synth_fft/synth_test.vhd
synth_fft/synth_fft
synth_fft
synth_fft/baseindex.vhd
synth_fft/but.vhd
synth_fft/butter_lib.vhd
synth_fft/comm.txt
synth_fft/control2.vhd
synth_fft/controller.vhd
synth_fft/counter.vhd
synth_fft/cycles_but.vhd
synth_fft/dff.vhd
synth_fft/divide.vhd
synth_fft/FLOAT2.PIF
synth_fft/FLOAT_RE.TXT
synth_fft/IEEE_TO_.PIF
synth_fft/ioadd.vhd
synth_fft/iod_staged.vhd
synth_fft/lblock.vhd
synth_fft/mult.vhd
synth_fft/multiply.vhd
synth_fft/mux_add.vhd
synth_fft/mux_but.vhd
synth_fft/negate.vhd
synth_fft/normalize.vhd
synth_fft/out_result.vhd
synth_fft/print.vhd
synth_fft/ram.vhd
synth_fft/ram_shift.vhd
synth_fft/rblock.vhd
synth_fft/result.txt
synth_fft/rom.vhd
synth_fft/romadd_gen.vhd
synth_fft/rom_ram.vhd
synth_fft/shift2.vhd
synth_fft/simili.lst
synth_fft/stage.vhd
synth_fft/subtractor.vhd
synth_fft/summer.vhd
synth_fft/swap.vhd
synth_fft/synth_main.vhd
synth_fft/synth_test.vhd
synth_fft/synth_fft/and_gates.vhd
synth_fft/synth_fft/baseindex.vhd
synth_fft/synth_fft/but.vhd
synth_fft/synth_fft/butter_lib.vhd
synth_fft/synth_fft/comm.txt
synth_fft/synth_fft/control2.vhd
synth_fft/synth_fft/controller.vhd
synth_fft/synth_fft/counter.vhd
synth_fft/synth_fft/cycles_but.vhd
synth_fft/synth_fft/dff.vhd
synth_fft/synth_fft/divide.vhd
synth_fft/synth_fft/FLOAT2.PIF
synth_fft/synth_fft/FLOAT_RE.TXT
synth_fft/synth_fft/IEEE_TO_.PIF
synth_fft/synth_fft/ioadd.vhd
synth_fft/synth_fft/iod_staged.vhd
synth_fft/synth_fft/lblock.vhd
synth_fft/synth_fft/mult.vhd
synth_fft/synth_fft/multiply.vhd
synth_fft/synth_fft/mux_add.vhd
synth_fft/synth_fft/mux_but.vhd
synth_fft/synth_fft/negate.vhd
synth_fft/synth_fft/normalize.vhd
synth_fft/synth_fft/out_result.vhd
synth_fft/synth_fft/print.vhd
synth_fft/synth_fft/ram.vhd
synth_fft/synth_fft/ram_shift.vhd
synth_fft/synth_fft/rblock.vhd
synth_fft/synth_fft/result.txt
synth_fft/synth_fft/rom.vhd
synth_fft/synth_fft/romadd_gen.vhd
synth_fft/synth_fft/rom_ram.vhd
synth_fft/synth_fft/shift2.vhd
synth_fft/synth_fft/simili.lst
synth_fft/synth_fft/stage.vhd
synth_fft/synth_fft/subtractor.vhd
synth_fft/synth_fft/summer.vhd
synth_fft/synth_fft/swap.vhd
synth_fft/synth_fft/synth_main.vhd
synth_fft/synth_fft/synth_test.vhd
synth_fft/synth_fft
synth_fft
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