文件名称:pinlvup
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- 上传时间：2012-11-16
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文件大小：203.1kb
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利用XILINX的SPARTAN-3A系列的XC3S200A的FPGA为载体，以VHDL为系统逻辑描述的表达方式，完成的数字频率计的设计。-SPARTAN-3A XILINX the use of the FPGA family XC3S200A to vector to the system Logic VHDL descr iption expressions, completed the design of Digital Frequency Meter.
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下载文件列表
pinlvup/control.sym
pinlvup/control.vhd
pinlvup/count.sym
pinlvup/count.vhd
pinlvup/count_bottom.vhd
pinlvup/fenpin.sym
pinlvup/fenpin.vhd
pinlvup/latch.sym
pinlvup/latch.vhd
pinlvup/multi.sym
pinlvup/multi.vhd
pinlvup/pinlv_up.sch
pinlvup/pinlv_up.schlog
pinlvup/pinlv_up.ucf
pinlvup/pinlv_up_guide.ncd
pinlvup/pinlv_up_summary.html
pinlvup/project_up.ise
pinlvup/project_up.ise_ISE_Backup
pinlvup/project_up.restore
pinlvup/__ISE_repository_project_up.ise_.lock
pinlvup
pinlvup/control.vhd
pinlvup/count.sym
pinlvup/count.vhd
pinlvup/count_bottom.vhd
pinlvup/fenpin.sym
pinlvup/fenpin.vhd
pinlvup/latch.sym
pinlvup/latch.vhd
pinlvup/multi.sym
pinlvup/multi.vhd
pinlvup/pinlv_up.sch
pinlvup/pinlv_up.schlog
pinlvup/pinlv_up.ucf
pinlvup/pinlv_up_guide.ncd
pinlvup/pinlv_up_summary.html
pinlvup/project_up.ise
pinlvup/project_up.ise_ISE_Backup
pinlvup/project_up.restore
pinlvup/__ISE_repository_project_up.ise_.lock
pinlvup
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