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文件名称:uart_test

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  • 上传时间:
    2012-11-16
  • 文件大小:
    575.14kb
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    1次
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介绍说明--下载内容来自于网络,使用问题请自行百度

Verilog 基于FPGA的直接RS232串口测试-Verilog FPGA-based test of direct RS232 serial port
相关搜索: uart test FPGA

(系统自动生成,下载前可以参看下载内容)

下载文件列表

uart_test/div_2.v
uart_test/my_uart_rx.v
uart_test/my_uart_top.v
uart_test/my_uart_tx.v
uart_test/speed_select.v
uart_test/uart_test/.compxlib.log
uart_test/uart_test/.lso
uart_test/uart_test/coregen_xil_2364_28.cgc
uart_test/uart_test/coregen_xil_2364_28.cgp
uart_test/uart_test/fuse.log
uart_test/uart_test/ipcore_dir/my_dcm.v
uart_test/uart_test/ipcore_dir/my_dcm.xaw
uart_test/uart_test/ipcore_dir/my_dcm_arwz.ucf
uart_test/uart_test/ipcore_dir/my_dcm_flist.txt
uart_test/uart_test/ipcore_dir/my_dcm_readme.txt
uart_test/uart_test/ipcore_dir/my_dcm_xmdf.tcl
uart_test/uart_test/ipcore_dir/xaw2verilog.log
uart_test/uart_test/iseconfig/my_uart_top.xreport
uart_test/uart_test/iseconfig/uart_test.projectmgr
uart_test/uart_test/isim/isim_usage_statistics.html
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/isimcrash.log
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/isimkernel.log
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/netId.dat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/tmp_save/_1
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/uart_tb_isim_beh.exe
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001058289214_3720193805.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001058289214_3720193805.didat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001058289214_3720193805.nt.obj
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001338139287_4008286146.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001338139287_4008286146.didat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001338139287_4008286146.nt.obj
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001410736348_1344228498.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001410736348_1344228498.didat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000001410736348_1344228498.nt.obj
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.didat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.nt.obj
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002036514112_1207231117.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002036514112_1207231117.didat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002036514112_1207231117.nt.obj
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002190066325_4073339861.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002190066325_4073339861.didat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000002190066325_4073339861.nt.obj
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000003792729819_2347171979.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000003792729819_2347171979.didat
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/m_00000000003792729819_2347171979.nt.obj
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/uart_tb_isim_beh.exe_main.c
uart_test/uart_test/isim/uart_tb_isim_beh.exe.sim/work/uart_tb_isim_beh.exe_main.nt.obj
uart_test/uart_test/isim/work/div_2.sdb
uart_test/uart_test/isim/work/glbl.sdb
uart_test/uart_test/isim/work/my_uart_rx.sdb
uart_test/uart_test/isim/work/my_uart_top.sdb
uart_test/uart_test/isim/work/my_uart_tx.sdb
uart_test/uart_test/isim/work/speed_select.sdb
uart_test/uart_test/isim/work/uart_tb.sdb
uart_test/uart_test/isim.cmd
uart_test/uart_test/isim.log
uart_test/uart_test/my_dcm.v
uart_test/uart_test/my_dcm_arwz.ucf
uart_test/uart_test/my_uart_top.bgn
uart_test/uart_test/my_uart_top.bit
uart_test/uart_test/my_uart_top.bld
uart_test/uart_test/my_uart_top.cmd_log
uart_test/uart_test/my_uart_top.drc
uart_test/uart_test/my_uart_top.lso
uart_test/uart_test/my_uart_top.ncd
uart_test/uart_test/my_uart_top.ngc
uart_test/uart_test/my_uart_top.ngd
uart_test/uart_test/my_uart_top.ngr
uart_test/uart_test/my_uart_top.pad
uart_test/uart_test/my_uart_top.par
uart_test/uart_test/my_uart_top.pcf
uart_test/uart_test/my_uart_top.prj
uart_test/uart_test/my_uart_top.ptwx
uart_test/uart_test/my_uart_top.stx
uart_test/uart_test/my_uart_top.syr
uart_test/uart_test/my_uart_top.twr
uart_test/uart_test/my_uart_top.twx
uart_test/uart_test/my_uart_top.ucf
uart_test/uart_test/my_uart_top.unroutes
uart_test/uart_test/my_uart_top.ut
uart_test/uart_test/my_uart_top.xpi
uart_test/uart_test/my_uart_top.xst
uart_test/uart_test/my_uart_top_bitgen.xwbt
uart_test/uart_test/my_uart_top_cs.blc
uart_test/uart_test/my_uart_top_cs.ngc
uart_test/uart_test/my_uart_top_envsettings.html
uart_test/uart_test/my_uart_top_fpga_editor.log
uart_test/uart_test/my_uart_top_guide.ncd
uart_test/uart_test/my_uart_top_map.map
uart_test/uart_test/my_uart_top_map.mrp
uart_test/uart_test/my_uart_top_map.ncd
uart_test/uart_test/my_uart_top_map.ngm
uart_test/uart_test/my_uart_top_map.xrpt
uart_test/uart_test/my_uart_top_ngdbuild.xrpt
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