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文件名称:FPGA-_RS232

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [WORD]
  • 上传时间：
    2012-11-16
  • 文件大小：
    2.75mb
  • 已下载：
    0次
  • 提 供 者：
    wang****
  • 相关连接：
    无
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

在完成了系统逻辑的设计和功能仿真后，我们要对所生成的VHDL文件进行综合，生成门级网表文件，-afew fwefwf 34rf4f
(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA _RS232/20071109_王淳_论文.doc
FPGA _RS232/A_the_whole_system/bandrate.bsf
FPGA _RS232/A_the_whole_system/bandrate.vhd
FPGA _RS232/A_the_whole_system/bandrate.vhd.bak
FPGA _RS232/A_the_whole_system/db/add_sub_4rh.tdf
FPGA _RS232/A_the_whole_system/db/add_sub_lsh.tdf
FPGA _RS232/A_the_whole_system/db/add_sub_nsh.tdf
FPGA _RS232/A_the_whole_system/db/altsyncram_mkj1.tdf
FPGA _RS232/A_the_whole_system/db/altsyncram_okj1.tdf
FPGA _RS232/A_the_whole_system/db/a_dpfifo_2h11.tdf
FPGA _RS232/A_the_whole_system/db/a_dpfifo_ug11.tdf
FPGA _RS232/A_the_whole_system/db/a_fefifo_18e.tdf
FPGA _RS232/A_the_whole_system/db/a_fefifo_t7e.tdf
FPGA _RS232/A_the_whole_system/db/cntr_0cb.tdf
FPGA _RS232/A_the_whole_system/db/cntr_bc7.tdf
FPGA _RS232/A_the_whole_system/db/cntr_cc7.tdf
FPGA _RS232/A_the_whole_system/db/cntr_vbb.tdf
FPGA _RS232/A_the_whole_system/db/dpram_se01.tdf
FPGA _RS232/A_the_whole_system/db/dpram_te01.tdf
FPGA _RS232/A_the_whole_system/db/mux_1hc.tdf
FPGA _RS232/A_the_whole_system/db/mux_cfc.tdf
FPGA _RS232/A_the_whole_system/db/prev_cmp_top.asm.qmsg
FPGA _RS232/A_the_whole_system/db/prev_cmp_top.fit.qmsg
FPGA _RS232/A_the_whole_system/db/prev_cmp_top.map.qmsg
FPGA _RS232/A_the_whole_system/db/prev_cmp_top.qmsg
FPGA _RS232/A_the_whole_system/db/prev_cmp_top.sim.qmsg
FPGA _RS232/A_the_whole_system/db/prev_cmp_top.tan.qmsg
FPGA _RS232/A_the_whole_system/db/scfifo_na11.tdf
FPGA _RS232/A_the_whole_system/db/scfifo_ra11.tdf
FPGA _RS232/A_the_whole_system/db/top.(0).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(0).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(1).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(1).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(10).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(10).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(11).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(11).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(12).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(12).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(2).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(2).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(3).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(3).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(4).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(4).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(5).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(5).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(6).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(6).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(7).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(7).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(8).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(8).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.(9).cnf.cdb
FPGA _RS232/A_the_whole_system/db/top.(9).cnf.hdb
FPGA _RS232/A_the_whole_system/db/top.asm.qmsg
FPGA _RS232/A_the_whole_system/db/top.cbx.xml
FPGA _RS232/A_the_whole_system/db/top.cmp.bpm
FPGA _RS232/A_the_whole_system/db/top.cmp.cdb
FPGA _RS232/A_the_whole_system/db/top.cmp.ecobp
FPGA _RS232/A_the_whole_system/db/top.cmp.hdb
FPGA _RS232/A_the_whole_system/db/top.cmp.logdb
FPGA _RS232/A_the_whole_system/db/top.cmp.rdb
FPGA _RS232/A_the_whole_system/db/top.cmp.tdb
FPGA _RS232/A_the_whole_system/db/top.cmp0.ddb
FPGA _RS232/A_the_whole_system/db/top.db_info
FPGA _RS232/A_the_whole_system/db/top.eco.cdb
FPGA _RS232/A_the_whole_system/db/top.fit.qmsg
FPGA _RS232/A_the_whole_system/db/top.hier_info
FPGA _RS232/A_the_whole_system/db/top.hif
FPGA _RS232/A_the_whole_system/db/top.map.bpm
FPGA _RS232/A_the_whole_system/db/top.map.cdb
FPGA _RS232/A_the_whole_system/db/top.map.ecobp
FPGA _RS232/A_the_whole_system/db/top.map.hdb
FPGA _RS232/A_the_whole_system/db/top.map.logdb
FPGA _RS232/A_the_whole_system/db/top.map.qmsg
FPGA _RS232/A_the_whole_system/db/top.map_bb.cdb
FPGA _RS232/A_the_whole_system/db/top.map_bb.hdb
FPGA _RS232/A_the_whole_system/db/top.map_bb.hdbx
FPGA _RS232/A_the_whole_system/db/top.map_bb.logdb
FPGA _RS232/A_the_whole_system/db/top.pre_map.cdb
FPGA _RS232/A_the_whole_system/db/top.pre_map.hdb
FPGA _RS232/A_the_whole_system/db/top.psp
FPGA _RS232/A_the_whole_system/db/top.root_partition.cmp.atm
FPGA _RS232/A_the_whole_system/db/top.root_partition.cmp.dfp
FPGA _RS232/A_the_whole_system/db/top.root_partition.cmp.hdbx
FPGA _RS232/A_the_whole_system/db/top.root_partition.cmp.logdb
FPGA _RS232/A_the_whole_system/db/top.root_partition.cmp.rcf
FPGA _RS232/A_the_whole_system/db/top.root_partition.map.atm
FPGA _RS232/A_the_whole_system/db/top.root_partition.map.hdbx
FPGA _RS232/A_the_whole_system/db/top.root_partition.map.info
FPGA _RS232/A_the_whole_system/db/top.rtlv.hdb
FPGA _RS232/A_the_whole_system/db/top.rtlv_sg.cdb
FPGA _RS232/A_the_whole_system/db/top.rtlv_sg_swap.cdb
FPGA _RS232/A_the_whole_system/db/top.sgdiff.cdb
FPGA _RS232/A_the_whole_system/db/top.sgdiff.hdb
FPGA _RS232/A_the_whole_system/db/top.signalprobe.cdb
FPGA _RS232/A_the_whole_system/db/top.sim.cvwf
FPGA _RS232/A_the_whole_system/db/top.sld_design_entry.sci
FPGA _RS232/A_the_whole_system/db/top.sld_design_entry_dsc.sci
FPGA _RS232/A_the_whole_system/db/top.syn_hier_info
FPGA _RS232/A_the_whole_system/db/top.

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