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文件名称:my_mbLCD

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    8.94mb
  • 已下载：
    0次
  • 提 供 者：
    c****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于XILINX SPARTAN 3E开发板编写的板上自带1602LCD的程序，程序基于MB软核开发。-Based on the XILINX SPARTAN 3E development board to write on the board with a 1602LCD procedure, procedure based on the MB core development.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

my_mbLCD/.compxlib.cfg
my_mbLCD/.cxl.mti_se.version
my_mbLCD/clock_generator_0_wrapper.ngc
my_mbLCD/clock_generator_0_wrapper.v
my_mbLCD/compxlib.cfg
my_mbLCD/dcm1.sym
my_mbLCD/dcm1.v
my_mbLCD/dcm1_arwz.ucf
my_mbLCD/device_usage_statistics.html
my_mbLCD/dlmb_cntlr_wrapper.ngc
my_mbLCD/dlmb_cntlr_wrapper.v
my_mbLCD/dlmb_wrapper.ngc
my_mbLCD/dlmb_wrapper.v
my_mbLCD/edkBmmFile.bmm
my_mbLCD/edkBmmFile_bd.bmm
my_mbLCD/elaborate/lmb_bram_elaborate_v1_00_a/hdl/verilog/lmb_bram_elaborate.v
my_mbLCD/ilmb_cntlr_wrapper.ngc
my_mbLCD/ilmb_cntlr_wrapper.v
my_mbLCD/ilmb_wrapper.ngc
my_mbLCD/ilmb_wrapper.v
my_mbLCD/ipcore_dir/dcm1.vhd
my_mbLCD/ipcore_dir/dcm1.xaw
my_mbLCD/ipcore_dir/dcm1_arwz.ucf
my_mbLCD/ipcore_dir/xaw2vhdl.log
my_mbLCD/leds_8bit_wrapper.v
my_mbLCD/lmb_bram_elaborate_v1_00_a/lmb_bram_elaborate/verilog.asm
my_mbLCD/lmb_bram_elaborate_v1_00_a/lmb_bram_elaborate/verilog.rw
my_mbLCD/lmb_bram_elaborate_v1_00_a/lmb_bram_elaborate/_primary.dat
my_mbLCD/lmb_bram_elaborate_v1_00_a/lmb_bram_elaborate/_primary.dbs
my_mbLCD/lmb_bram_elaborate_v1_00_a/lmb_bram_elaborate/_primary.vhd
my_mbLCD/lmb_bram_elaborate_v1_00_a/_info
my_mbLCD/lmb_bram_elaborate_v1_00_a/_vmake
my_mbLCD/lmb_bram_wrapper.ngc
my_mbLCD/lmb_bram_wrapper.v
my_mbLCD/mb_cpu1/bitinit.log
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/mb_cpu1_w_blkd.xml
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtSvgBLKD_Dimensions.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtSvgDiag_Colors.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtSvgDiag_Globals.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtSvgDiag_StyleDefs.css
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_BusLaneSpaces.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_Busses.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_Functions.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_Globals.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_IOPorts.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_Main.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_Peripherals.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_Processors.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgBLKD_StyleDefs.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtTinySvgDiag_BifShapes.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtXdsGen_Colors.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtXdsGen_Globals.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtXdsGen_HTMLDatasheet.css
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtXdsGen_HTMLDatasheet.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtXdsGen_HTMLIPSection.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtXdsGen_HTMLMemoryMap.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/MdtXdsGen_HTMLTOCTree.xsl
my_mbLCD/mb_cpu1/blockdiagram/.dswkshop/svg10.dtd
my_mbLCD/mb_cpu1/blockdiagram/mb_cpu1.css
my_mbLCD/mb_cpu1/blockdiagram/mb_cpu1.svg
my_mbLCD/mb_cpu1/blockdiagram/svg10.dtd
my_mbLCD/mb_cpu1/clock_generator_0.log
my_mbLCD/mb_cpu1/data/mb_cpu1.ucf
my_mbLCD/mb_cpu1/etc/bitgen.ut
my_mbLCD/mb_cpu1/etc/bitgen.ut.virtex5
my_mbLCD/mb_cpu1/etc/download.cmd
my_mbLCD/mb_cpu1/etc/fast_runtime.opt
my_mbLCD/mb_cpu1/etc/fast_runtime.opt.virtex5
my_mbLCD/mb_cpu1/hdl/clock_generator_0_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/dlmb_cntlr_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/dlmb_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/elaborate/lmb_bram_elaborate_v1_00_a/hdl/verilog/lmb_bram_elaborate.v
my_mbLCD/mb_cpu1/hdl/ilmb_cntlr_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/ilmb_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/lmb_bram_wrapper.v
my_mbLCD/mb_cpu1/hdl/mb_cpu1.v
my_mbLCD/mb_cpu1/hdl/mb_cpu1_stub.v
my_mbLCD/mb_cpu1/hdl/mb_plb_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/mdm_0_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/microblaze_0_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/proc_sys_reset_0_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/rs232_dce_wrapper.vhd
my_mbLCD/mb_cpu1/hdl/xps_gpio_0_wrapper.vhd
my_mbLCD/mb_cpu1/implementation/cache/cache.cat
my_mbLCD/mb_cpu1/implementation/cache/clock_generator_0_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/dlmb_cntlr_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/dlmb_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/ilmb_cntlr_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/ilmb_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/lmb_bram_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/mb_plb_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/mdm_0_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/microblaze_0_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/proc_sys_reset_0_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/rs232_dce_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/cache/xps_gpio_0_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/clock_generator_0_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/clock_generator_0_wrapper.ngc_xst.xrpt
my_mbLCD/mb_cpu1/implementation/clock_generator_0_wrapper_vhdl.prj
my_mbLCD/mb_cpu1/implementation/dlmb_cntlr_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/dlmb_cntlr_wrapper.ngc_xst.xrpt
my_mbLCD/mb_cpu1/implementation/dlmb_cntlr_wrapper_vhdl.prj
my_mbLCD/mb_cpu1/implementation/dlmb_wrapper.ngc
my_mbLCD/mb_cpu1/implementation/dlmb_wrapper.ngc_xst.xrpt
my_mbLCD/mb_cpu1/implementatio

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