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文件名称:i2c_controller

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  • 上传时间:
    2012-11-16
  • 文件大小:
    1.89mb
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采用Verilog语言实现I2C master controller的示例,有测试程序-The Verilog language implementation the I2C master controller example, testing program
(系统自动生成,下载前可以参看下载内容)

下载文件列表

i2c_controller/
i2c_controller/chart/
i2c_controller/chart/Thumbs.db
i2c_controller/chart/ͼ7-11.bmp
i2c_controller/chart/ͼ7-12.bmp
i2c_controller/chart/ͼ7-14.bmp
i2c_controller/chart/ͼ7-15.bmp
i2c_controller/chart/ͼ7-16.bmp
i2c_controller/chart/ͼ7-17.bmp
i2c_controller/chart/ͼ7-18.bmp
i2c_controller/chart/ͼ7-21.bmp
i2c_controller/chart/ͼ7-22.bmp
i2c_controller/chart/ͼ7-23.bmp
i2c_controller/i2c_controller.cr.mti
i2c_controller/i2c_controller.mpf
i2c_controller/i2c_master_bit_ctrl.v
i2c_controller/i2c_master_byte_ctrl.v
i2c_controller/i2c_master_defines.v
i2c_controller/i2c_master_top.v
i2c_controller/i2c_slave_model.v
i2c_controller/timescale.v
i2c_controller/transcript
i2c_controller/tst_bench_top.v
i2c_controller/vsim.wlf
i2c_controller/wave/
i2c_controller/wave/i2c_master_bit_ctrl.bmp
i2c_controller/wave/i2c_master_byte_ctrl.bmp
i2c_controller/wave/i2c_master_top.bmp
i2c_controller/wave/i2c_slave_model.bmp
i2c_controller/wave/Thumbs.db
i2c_controller/wave/tst_bench_top.bmp
i2c_controller/wave/wb_master_model.bmp
i2c_controller/wb_master_model.v
i2c_controller/work/
i2c_controller/work/delay/
i2c_controller/work/delay/verilog.asm
i2c_controller/work/delay/_primary.dat
i2c_controller/work/delay/_primary.vhd
i2c_controller/work/i2c_master_bit_ctrl/
i2c_controller/work/i2c_master_bit_ctrl/verilog.asm
i2c_controller/work/i2c_master_bit_ctrl/_primary.dat
i2c_controller/work/i2c_master_bit_ctrl/_primary.vhd
i2c_controller/work/i2c_master_byte_ctrl/
i2c_controller/work/i2c_master_byte_ctrl/verilog.asm
i2c_controller/work/i2c_master_byte_ctrl/_primary.dat
i2c_controller/work/i2c_master_byte_ctrl/_primary.vhd
i2c_controller/work/i2c_master_top/
i2c_controller/work/i2c_master_top/verilog.asm
i2c_controller/work/i2c_master_top/_primary.dat
i2c_controller/work/i2c_master_top/_primary.vhd
i2c_controller/work/i2c_slave_model/
i2c_controller/work/i2c_slave_model/verilog.asm
i2c_controller/work/i2c_slave_model/_primary.dat
i2c_controller/work/i2c_slave_model/_primary.vhd
i2c_controller/work/tst_bench_top/
i2c_controller/work/tst_bench_top/verilog.asm
i2c_controller/work/tst_bench_top/_primary.dat
i2c_controller/work/tst_bench_top/_primary.vhd
i2c_controller/work/wb_master_model/
i2c_controller/work/wb_master_model/verilog.asm
i2c_controller/work/wb_master_model/_primary.dat
i2c_controller/work/wb_master_model/_primary.vhd
i2c_controller/work/_info

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