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文件名称:exercise_4.1
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exercise_4.1/ADC_BSP_Spartan_3E.vi
exercise_4.1/Exercise 41.aliases
exercise_4.1/Exercise 41.lvproj
exercise_4.1/FPGA Bitfiles/Exercise 41.lvproj_FPGA Target 2_ADC.vi.lvbit
exercise_4.1/FPGA Bitfiles/Exercise 41.lvproj_FPGA Target 2_Simple AIAO (FPGA)~F0.lvbit
exercise_4.1/FPGA Bitfiles/Exercise 41.lvproj_FPGA Target_Simple AIAO (FPGA)~D2.lvbit
exercise_4.1/Readme 41.txt
exercise_4.1/Simple AIAO (FPGA).vi
exercise_4.1/Simple AIAO (FPGA)_Spartan3E.vi
exercise_4.1/FPGA Bitfiles
exercise_4.1
exercise_4.1/Exercise 41.aliases
exercise_4.1/Exercise 41.lvproj
exercise_4.1/FPGA Bitfiles/Exercise 41.lvproj_FPGA Target 2_ADC.vi.lvbit
exercise_4.1/FPGA Bitfiles/Exercise 41.lvproj_FPGA Target 2_Simple AIAO (FPGA)~F0.lvbit
exercise_4.1/FPGA Bitfiles/Exercise 41.lvproj_FPGA Target_Simple AIAO (FPGA)~D2.lvbit
exercise_4.1/Readme 41.txt
exercise_4.1/Simple AIAO (FPGA).vi
exercise_4.1/Simple AIAO (FPGA)_Spartan3E.vi
exercise_4.1/FPGA Bitfiles
exercise_4.1
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