文件名称:counter
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- 上传时间：2012-11-16
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VHDL 脉冲输入15进制输出计数器
计数器是实际中最为实用的时序电路模块之一-VHDL pulse input the counter of the output of the 15 hexadecimal counter the one of the of yes one of the the actual in the the most practical timing circuit module
计数器是实际中最为实用的时序电路模块之一-VHDL pulse input the counter of the output of the 15 hexadecimal counter the one of the of yes one of the the actual in the the most practical timing circuit module
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下载文件列表
counter/cds.lib
counter/counter.vhd
counter/hdl.var
counter/ncelab.log
counter/nclaunch.key
counter/ncsim.key
counter/ncsim.log
counter/ncvhdl.log
counter/tb.vhd
counter/INCA_libs/worklib/inca.lnx86.151.pak
counter/waves.shm/waves.dsn
counter/waves.shm/waves.trn
counter/INCA_libs/worklib
counter/INCA_libs
counter/waves.shm
counter
counter/counter.vhd
counter/hdl.var
counter/ncelab.log
counter/nclaunch.key
counter/ncsim.key
counter/ncsim.log
counter/ncvhdl.log
counter/tb.vhd
counter/INCA_libs/worklib/inca.lnx86.151.pak
counter/waves.shm/waves.dsn
counter/waves.shm/waves.trn
counter/INCA_libs/worklib
counter/INCA_libs
counter/waves.shm
counter
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