资源列表
adaptive_blind_equalization_using_bottleneck_netw
- Adaptive Blind Equalization Using Bottleneck Networks Implemented by Evolvable Hardware.Using a genetic algorithm, the network on the hardware is trained to minimize an energy function based on the maximum likelihood estimation. Simulation resu
Diversity-techniques-for-blind-channel-equalizati
- Diversity techniques for blind channel equalization in mobile communications.This paper deals with blind equalization of mobile channels, which are either frequency-selective or multiplicative. The proposed algorithm can be used for channel dis
channel-equalization11111
- Tutorial on Channel Equalization for Mobile Channels.Equalizer design for multi-path channels is closely linked to the distribution of zeros of mobile channels. While in a deterministic scenario, equalizers can be designed based on knowledge
Time-Varying-Mobile-Channels
- Identification and Tracking of Rapidly Time Varying Mobile Channels for Improved Equalization.The goal of this paper is to investigate the effectiveness of this channel tracking method when applied to rapidly fading channels. It is shown that, by a
An-Adaptive-Block-Based-Eigenvector-Equalization.
- An Adaptive Block-Based Eigenvector Equalization for Time-Varying Multipath Fading Channels.In this paper we present an adaptive Block- Based EigenVector Algorithm (BBEVA) for blind equalization of time-varying multipath fading channels. In addit
3.ModelStability
- Since the main component of a control scheme is the PI Controller, a model with an anti wind-up structure has been implemented in Simulink. The Maximum Power Point Tracker (MPPT) block is based on a look-up table obtained from the wind turbine charac
tikz
- tikz manual use of tikz code in latex to draw good circuit diagrams.
xitong
- 51单片机最小系统的详细制作，内含每个步骤的实物图-51 SCM minimum system produced, containing the physical map of each step
USB-byteBlaster
- quartus软件的usb bityblaster安装方法-quartus 2 software usb byteblaster install
Principles-of-Verifiable-RTL-Design
- 本书主要以HDL（verilog/vhdl）为例，详细讲述了在IC DESIGN FLOW中 Verification 以及Test的设计思想、方法和技巧，涵概了测试的各个方面， 是目前进行IC设计的同仁们最为推荐的一本宝典-Book HDL (verilog/vhdl), a detailed account of the IC DESIGN FLOW, Verification and Test of design ideas, methods and techniques, and
Functional-Verification
- 比较早的介绍有关RTL Validation设计的宝典书籍，是原来HP的一位大牛撰写的！！ 你可以到作者的网站看看，有相关的本书的设计范例以及scr ipt下载！如果想使 RTL设计非常的完美，保证你的后端设计一次成功的，这本书是不可缺少的。-Relatively early introduction about the design of RTL Validation Collection books, original HP a large cattle written! ! You
FPGA-pin-assign
- FPGA管脚分配需要考虑的因素 FPGA管脚分配需要考虑的因素.rar-FPGA pin assignment need to consider factors FPGA pin allocation factors to be considered. Rar