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  1. Manley-P-STM32-board-schematics

    0下载:
  2. 万利+STM32开发板原理图,万利+STM32开发板原理图-Manley+ STM32 board schematics,Manley+ STM32 board schematics
  3. 所属分类:Project Design

    • 发布日期:2017-04-28
    • 文件大小:81.8kb
    • 提供者:zhijun
  1. Wildfire-stm32-board-schematics

    0下载:
  2. 野火stm32开发板原理图,野火stm32开发板原理图-Wildfire stm32 board schematics,Wildfire stm32 board schematics
  3. 所属分类:Project Design

    • 发布日期:2017-04-03
    • 文件大小:100.32kb
    • 提供者:zhijun
  1. SSD1963-driver-Program

    0下载:
  2. SSD1963驱动程序,SSD1963驱动程序-SSD1963 driver Program,SSD1963 driver Program
  3. 所属分类:software engineering

    • 发布日期:2017-04-29
    • 文件大小:148.35kb
    • 提供者:zhijun
  1. pca

    0下载:
  2. PCA program with java neatbeans
  3. 所属分类:software engineering

    • 发布日期:2017-04-24
    • 文件大小:29.21kb
    • 提供者:filkom
  1. crud

    0下载:
  2. cread update delete with PHP and Bootstrap-cread read update delete with PHP and Bootstrap
  3. 所属分类:Project Design

    • 发布日期:2017-05-13
    • 文件大小:3.08mb
    • 提供者:filkom
  1. C#设计总结

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  2. 关于C#程序设计中出现的各种问题及解决方法
  3. 所属分类:软件工程

  1. verilog-a-lrm-1-0

    0下载:
  2. The information contained in this draft manual represents the definition of the Verilog-A hardware descr iption language as proposed by OVI (Analog TSC) as of January, 1996. Open Verilog International makes no warranties whatsoever with respect t
  3. 所属分类:software engineering

    • 发布日期:2017-04-26
    • 文件大小:211.32kb
    • 提供者:bkaraca
  1. verilog-ieee

    0下载:
  2. The Verilog ¤ Hardware Descr iption Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it
  3. 所属分类:software engineering

    • 发布日期:2017-05-11
    • 文件大小:2.08mb
    • 提供者:bkaraca
  1. SystemVerilog_3.1a

    0下载:
  2. Accellera Standards documents are developed within Accellera and the Technical Committees of Accellera Organization, Inc. Accellera develops its standards through a consensus development process, approved by its members and board of directors, wh
  3. 所属分类:software engineering

    • 发布日期:2017-05-13
    • 文件大小:2.82mb
    • 提供者:bkaraca
  1. VerilogLangRefManual

    0下载:
  2. The information contained in this draft manual represents the definition of the Verilog hardware descr iption language as it existed at the time Cadence Design Systems, Inc. transferred the language and its documentation to Open Verilog International
  3. 所属分类:software engineering

    • 发布日期:2017-05-07
    • 文件大小:1.18mb
    • 提供者:bkaraca
  1. kursa4

    0下载:
  2. program with matrics
  3. 所属分类:software engineering

    • 发布日期:2017-05-03
    • 文件大小:641.24kb
    • 提供者:irina2323
  1. GaussianMixture

    0下载:
  2. source code for graph cuts in computer vision
  3. 所属分类:software engineering

    • 发布日期:2017-04-12
    • 文件大小:710byte
    • 提供者:ithri
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